Bug 102562 - [BAT][GDG] Many assertions hit hinting that writing to the memory fails
Summary: [BAT][GDG] Many assertions hit hinting that writing to the memory fails
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: XOrg git
Hardware: Other All
: high critical
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks:
 
Reported: 2017-09-06 14:38 UTC by Martin Peres
Modified: 2017-09-07 07:42 UTC (History)
1 user (show)

See Also:
i915 platform: I915GM
i915 features:


Attachments

Description Martin Peres 2017-09-06 14:38:55 UTC
Between CI_DRM_2851 and CI_DRM_3045, the kernel regressed on the machine fi-gdg-551 and started producing errors such as in many tests:

(gem_exec_store:2771) CRITICAL: Test assertion failure function store_dword, file gem_exec_store.c:94:
(gem_exec_store:2771) CRITICAL: Failed assertion: *batch == 0xc0ffee
(gem_exec_store:2771) CRITICAL: error: 0 != 12648430

Here are the logs:

- igt@gem_ringfill:
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_ringfill@basic-default-forked.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_ringfill@basic-default-interruptible.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_ringfill@basic-default-fd.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_ringfill@basic-default-hang.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_ringfill@basic-default.html

- igt@gem_exec_store:
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_store@basic-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_mmap_gtt@basic-small-bo-tiledx.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_fence@nb-await-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_fence@await-hang-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_store@basic-all.html

- igt@gem_exec_suspend:
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_suspend@basic-s3.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_suspend@basic.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_suspend@basic-s4-devices.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_parallel@basic.html

- igt@gem_exec_(gttfill|reloc):
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_gttfill@basic.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_reloc@basic-write-gtt-active.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_reloc@basic-gtt-read-active.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_reloc@basic-write-cpu-active.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_reloc@basic-gtt-active.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_reloc@basic-gtt-cpu-active.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_reloc@basic-cpu-gtt-active.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_reloc@basic-cpu-read-active.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_reloc@basic-write-read-active.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_reloc@basic-cpu-active.html

- igt@gem_exec_.*:
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-wb-ro-before-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-wb-ro-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-wb-set-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-uc-rw-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-batch-kernel-default-uc.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-wb-rw-before-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-uc-ro-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-wb-prw-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_fence@basic-await-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_store@basic-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-batch-kernel-default-wb.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-wb-rw-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-uc-prw-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-uc-set-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-uc-pro-default.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3045/fi-gdg-551/igt@gem_exec_flush@basic-wb-pro-default.html
Comment 2 Chris Wilson 2017-09-06 17:09:56 UTC
commit 90cad095eeaa43711d60066096cddaf0d3b58bf6
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Wed Sep 6 16:28:59 2017 +0100

    drm/i915: Disable MI_STORE_DATA_IMM for i915g/i915gm
    
    The early gen3 machines (i915g/Grantsdale and i915gm/Alviso) share a lot
    of characteristics in their MI/GTT blocks with gen2, and in particular
    can only use physical addresses in MI_STORE_DATA_IMM. This makes it
    incompatible with our usage, so include those two machines in the
    blacklist to prevent usage.
    
    v2: Make it easy for gcc and rewrite it as a switch to save some space.
    
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> #v1
    Link: https://patchwork.freedesktop.org/patch/msgid/20170906152859.5304-1-chris@chris-wilson.co.uk
Comment 3 Chris Wilson 2017-09-06 18:08:16 UTC
commit dddbc2ed136f3edf007366c2e81c3f735bd29266
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Wed Sep 6 15:34:13 2017 +0100

    lib: Disable MI_STORE_DATA_IMM for gen3 (i915g and i915gm)
    
    The early gen3 machines inherited the MI block and restrictions from
    gen2, and may only use physical addresses in conjunction with
    MI_STORE_DATA_IMM -- that makes it unusable for us from userspace, where
    we can only use virtual offsets.
    
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Comment 4 Martin Peres 2017-09-07 07:42:06 UTC
Thanks a lot Chris! The platform runs pretty well now :)


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