Bug 102650 - [CI][ALL] igt@sw_sync@timeline_closed - Failure waiting on unsignaled fence on closed timeline
Summary: [CI][ALL] igt@sw_sync@timeline_closed - Failure waiting on unsignaled fence o...
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: IGT (show other bugs)
Version: XOrg git
Hardware: Other All
: high critical
Assignee: Default DRI bug account
QA Contact:
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks:
 
Reported: 2017-09-11 09:01 UTC by Martin Peres
Modified: 2017-09-15 18:54 UTC (History)
1 user (show)

See Also:
i915 platform: ALL
i915 features: GEM/Other


Attachments

Description Martin Peres 2017-09-11 09:01:52 UTC
On CI_DRM_3064, the all the machines running igt@sw_sync@timeline_closed started failing the test with the following error message:
	
(sw_sync:1591) CRITICAL: Test assertion failure function test_timeline_closed, file sw_sync.c:86:
(sw_sync:1591) CRITICAL: Failed assertion: sync_fence_wait(fence, 0) == -ETIME
(sw_sync:1591) CRITICAL: Last errno: 2, No such file or directory
(sw_sync:1591) CRITICAL: Failure waiting on unsignaled fence on closed timeline

It appears to be due to [1] since there were no IGT changes and this is the only line in commits_short.

[1] ea4d5a270b57 dma-buf/sw_sync: force signal all unsignaled fences on dying timeline 

Full logs:
 - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3064/shard-snb5/igt@sw_sync@timeline_closed.html
 - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3064/shard-hsw4/igt@sw_sync@timeline_closed.html
 - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3064/shard-apl6/igt@sw_sync@timeline_closed.html
 - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3064/shard-kbl3/igt@sw_sync@timeline_closed.html
Comment 1 Chris Wilson 2017-09-11 09:10:07 UTC
Test needs to be updated to reflect the kernel.
Comment 2 Chris Wilson 2017-09-12 14:04:01 UTC
commit c7e116007e907f32c18cc2669e2dc4046553c8e6 (HEAD, upstream/master)
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Mon Sep 11 13:23:27 2017 +0100

    igt/sw_sync: Fix up close(timeline) tests for unsignaled fences
    
    Following
    
    kernel commit ea4d5a270b57fa8d4871f372ca9b97b7697fdfda
    Author: Dominik Behr <dbehr@chromium.org>
    Date:   Thu Sep 7 16:02:46 2017 -0300
    
        dma-buf/sw_sync: force signal all unsignaled fences on dying timeline
    
        To avoid hanging userspace components that might have been waiting on the
        active fences of the destroyed timeline we need to signal with error all
        remaining fences on such timeline.
    
        This restore the default behaviour of the Android sw_sync framework, which
        Android still relies on. It was broken on the dma fence conversion a few
        years ago and never fixed.
    
    unsignaled fences are now signaled and flagged with ENOENT when the
    timeline is closed. Fixup timeline_closed_signaled to match.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102650
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Comment 3 Elizabeth 2017-09-15 16:03:07 UTC
Does this need to be verified or can we closed it? Thanks.
Comment 4 Martin Peres 2017-09-15 18:54:13 UTC
Apparently, it has not been a problem for us, so let's properly close it! I will tell Jani to use CLOSED/FIXED next time :)


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