https://intel-gfx-ci.01.org/tree/drm-tip/IGT_4146/shard-apl6/igt@gem_tiled_fence_blits@normal.html https://intel-gfx-ci.01.org/tree/drm-tip/IGT_4146/shard-kbl3/igt@gem_tiled_fence_blits@normal.html Subtest normal: CRASH (2.798s) Received signal SIGSEGV. Stack trace: #0 [fatal_sig_handler+0xfb] #1 [killpg+0x40] #2 [run_test+0x157] #3 [<unknown>+0x157] Received signal SIGSEGV. Stack trace: #0 [fatal_sig_handler+0xfb] #1 [killpg+0x40] #2 [<unknown>+0x40]
test prints:Using 6143 1MiB buffers, i.e. count = 6143, however: "static void run_test (int fd, int count) { drm_intel_bo *bo[4096]; uint32_t bo_start_val[4096];" bo is pnly 4096. so first loop goes boom: " for (i = 0; i < count; i++) { bo[i] = create_bo(fd, start); "
https://patchwork.freedesktop.org/patch/198256/
commit 319a1de94c363863d70b1ec8950d55894a903cbb (HEAD, upstream/master) Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed Jan 17 11:45:30 2018 +0000 igt/gem_tiled_fence_blits: Allocate bo array As we allow more buffers to be allocated to fill larger apertures, we may exceed the static allocation of 4096 buffers. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104669 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Thanks Chris, I will close once the results are in.
Fixed used from CI_DRM_3641/, test is green
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