Bug 106083 - [CI] igt@kms_frontbuffer_tracking@* - Test assertion failure function get_sink_crc, Failed assertion: rc != -1
Summary: [CI] igt@kms_frontbuffer_tracking@* - Test assertion failure function get_sin...
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: XOrg git
Hardware: Other All
: medium normal
Assignee: Dhinakaran Pandiyan
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks:
 
Reported: 2018-04-16 16:58 UTC by Martin Peres
Modified: 2018-08-01 12:47 UTC (History)
1 user (show)

See Also:
i915 platform: SKL
i915 features: display/Other


Attachments

Description Martin Peres 2018-04-16 16:58:01 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_13/fi-skl-6700hq/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_14/fi-skl-6700hq/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-wc.html

(kms_frontbuffer_tracking:1750) CRITICAL: Test assertion failure function get_sink_crc, file ../tests/kms_frontbuffer_tracking.c:1012:
(kms_frontbuffer_tracking:1750) CRITICAL: Failed assertion: rc != -1
(kms_frontbuffer_tracking:1750) CRITICAL: Last errno: 5, Input/output error
(kms_frontbuffer_tracking:1750) CRITICAL: Unexpected error: 5
Subtest fbc-1p-primscrn-pri-shrfb-draw-blt failed.
Comment 1 Dhinakaran Pandiyan 2018-07-14 22:49:58 UTC
Should not be seen anymore

Author: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Date:   Thu Jul 12 01:09:40 2018 -0700

    tests/frontbuffer_tracking: Do not test sink crc

    eDP sink crc reads use vblank interrupts that cause PSR exit and
    therefore makes them unsuitable for PSR testing. Besides that, reading
    sink CRC via the AUX channel for testing when the HW also is most likely
    is going to be using AUX channel is a recipe for inconsistent test
    results. Thirdly, CRC's have been seen to be noisy or vary across sinks for
    the same driver and test code. We tradeoff the ability to validate what the
    sink is displaying for correctness.

    Cc: Daniel Vetter <daniel@ffwll.ch>
    Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
    Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
    Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Comment 2 Lukasz Kalamarz 2018-08-01 12:47:30 UTC
Issue last visible in CI more than 2 weeks ago. Closing this bug.


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