https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4553/fi-cnl-psr/igt@drv_selftest@live_objects.html https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4552/fi-icl-u/igt@drv_selftest@live_objects.html [ 609.719934] Partial view for 3739 [155] (offset=3584, size=256 [256, row size 0], fence=-1, tiling=0, stride=0) misalignment, expected write to page (3739 + 0 [0xe9b000]) of 0xe9b, found 0xc31e7b [ 609.720094] i915/i915_gem_object_live_selftests: igt_partial_tiling failed with error -22 [ 609.956121] i915: probe of 0000:00:02.0 failed with error -22
Setting to high since it affects CNL and ICL, but it only affects one test, so no need to go to highest.
It's a pretty severe failure. That reading from the gtt is broken may impact virtually any test if the timing is against us. More interesting is the coherency results, which suggest that we need to mark cnl+ as having an incoherent gtt.
commit 21eb1850fa0bd0a9b729bf3708da78888433027f (HEAD -> drm-intel-next-queued, drm-intel/for-linux-next, drm-intel/drm-intel-next-queued) Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed Aug 1 11:47:21 2018 +0100 drm/i95: Mark GGTT as incoherent for gen10+ The evidence suggests that we need to start treating writes via GGTT as incoherent for gen10+, that is that they are internally buffered and not immediately visible via a read along a different physical path. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107398 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107400 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107435 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180801104721.4030-1-chris@chris-wilson.co.uk
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