https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_93/fi-icl-u/igt@gem_exec_schedule@preempt-other-chain-render.html https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_93/fi-icl-u/igt@gem_exec_schedule@preempt-queue-contexts-vebox.html https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_93/fi-icl-u/igt@gem_exec_schedule@preempt-contexts-render.html And 23 others...
Increasing the priority of ICL bugs.
commit ee435831ec83344dba5ccddd4ffcc6ca95d1cf77 Author: Paulo Zanoni <paulo.r.zanoni@intel.com> Date: Thu Aug 9 16:58:52 2018 -0700 drm/i915/icl: account for context save/restore removed bits The RS_CTX_ENABLE and CTX_SAVE_INHIBIT bits are not present on ICL anymore, but we still try to set them and then check them with GEM_BUG_ON, resulting in a BUG() call. The bug can be reproduced by igt/drv_selftest/live_hangcheck/others-priority and our CI was able to catch it. It is worth noticing that commit 05f0addd9b10 ("drm/i915/icl: Enhanced execution list support") already tried to avoid the save bits on ICL, but only inside populate_lr_context(). Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Testcase: igt/drv_selftest/live_hangcheck/others-priority Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107399 References: 05f0addd9b10 ("drm/i915/icl: Enhanced execution list support") Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180809235852.24516-1-paulo.r.zanoni@intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Looks good! Thanks Chris!
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