Bug 107912 - Please add support for PIPE_CAP_TGSI_MUL_ZERO_WINS to radeonsi
Summary: Please add support for PIPE_CAP_TGSI_MUL_ZERO_WINS to radeonsi
Status: RESOLVED MOVED
Alias: None
Product: Mesa
Classification: Unclassified
Component: Drivers/Gallium/radeonsi (show other bugs)
Version: git
Hardware: Other All
: medium enhancement
Assignee: Default DRI bug account
QA Contact: Default DRI bug account
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Reported: 2018-09-12 21:39 UTC by Axel Davy
Modified: 2019-09-25 18:09 UTC (History)
0 users

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Description Axel Davy 2018-09-12 21:39:03 UTC 
PIPE_CAP_TGSI_MUL_ZERO_WINS is a cap currently supported by nv50, nvc0 and r600, which means that TGSI_PROPERTY_MUL_ZERO_WINS is supported.

When enabled, the affected shaders have the behaviour 0*anything = 0 (including inside a mad). It is used by gallium nine when available.

All GCN cards support special legacy instructions to handle the behaviour.

Since opengl compat used to be a thing "we will never support because lack of time" and is now implemented, I thought maybe this MUL_ZERO_WINS may get added to the new radeonsi TODO list.
Comment 1 GitLab Migration User 2019-09-25 18:09:48 UTC 
-- GitLab Migration Automatic Message --

This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity.

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