These tests were introduced in IGT_4738 (https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/333f1386dcfc8d94830cf6458393cefdee6d4663) and failed immediately on ICL, GLK, and APL.

A CI Bug Log filter associated to this bug has been updated:

{- APL GLK ICL: igt@kms_plane@pixel-format-pipe-[abc]-planes-source-clamping - fail - Failed assertion: !mismatch -}
{+ BSW APL GLK ICL: igt@kms_plane@pixel-format-pipe-[abc]-planes-source-clamping - fail - Failed assertion: !mismatch +}

New failures caught by the filter:

* https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_170/fi-bsw-kefka/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
* https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_171/fi-bsw-kefka/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
* https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_174/fi-bsw-kefka/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html
* https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_177/fi-bsw-kefka/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
* https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_179/fi-bsw-kefka/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html

A CI Bug Log filter associated to this bug has been updated:

{- BSW APL GLK ICL: igt@kms_plane@pixel-format-pipe-[abc]-planes-source-clamping - fail - Failed assertion: !mismatch -}
{+ BSW APL KBL GLK CFL WHL ICL: igt@kms_plane@pixel-format-pipe-[abc]-planes-source-clamping - fail - Failed assertion: !mismatch +}

New failures caught by the filter:

* https://intel-gfx-ci.01.org/tree/drm-tip/IGT_4768/shard-kbl3/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html

I reproduced the issue on ICL with eDP.
I could see the subtests with YUV Pixel formats were failing, due to CRC Mismatch.

The CRC for the given flip, was different for each run, and not matching with the reference CRC.
So I recreated that flip, and checked the CRC for Plane index 0, 1 and 2.
Looks like initially the CRC is unstable, but becomes stable soon after.

Which lead me to add a delay between the commit and CRC capture, to check if that solves the problem.

With this the CRC does match for Plane index 0, 1, and 2, but for Plane-index 3, the CRC again does not match even after a substantial delay.

Debug in progress.

The issue is seen only on the SDR Planes in ICL (Plane 4 onwards) for YUV Format.

I suspect some where the plane color csc is causing the trouble.
In the kernel, for ICL, if the format is YUV, and the plane is SDR, CSC is requested from YUV709 to RGB709.
This is the point different than the icl hdr planes, for which the CRC is matching correctly. Not sure though.
Debug in progress.

A CI Bug Log filter associated to this bug has been updated:

{- BSW APL KBL GLK CFL WHL ICL: igt@kms_plane@pixel-format-pipe-[abc]-planes-source-clamping - fail - Failed assertion: !mismatch -}
{+ BSW APL SKL KBL GLK CFL WHL ICL: igt@kms_plane@pixel-format-pipe-[abc]-planes-source-clamping - fail - Failed assertion: !mismatch +}

New failures caught by the filter:

* https://intel-gfx-ci.01.org/tree/drm-tip/IGT_4780/shard-skl3/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html

Closing the bug, as the test has been reworked and the filters can't match anymore.

The CI Bug Log issue associated to this bug has been archived.

New failures matching the above filters will not be associated to this bug anymore.