Bug 109287 - [CI][SHARDS] igt@gem_mocs_settings@* - skip - Test requirement: get_mocs_settings(fd, &table, false), Last errno: 2, No such file or directory
Summary: [CI][SHARDS] igt@gem_mocs_settings@* - skip - Test requirement: get_mocs_sett...
Status: RESOLVED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: XOrg git
Hardware: Other All
: high normal
Assignee: prathap.kumar.valsan
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks:
 
Reported: 2019-01-10 14:22 UTC by Martin Peres
Modified: 2019-04-17 14:49 UTC (History)
2 users (show)

See Also:
i915 platform: ICL
i915 features: GEM/Other


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Description Martin Peres 2019-01-10 14:22:12 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/igt@gem_mocs_settings@mocs-settings-blt.html

Test requirement not met in function __real_main433, file ../tests/i915/gem_mocs_settings.c:443:
Test requirement: get_mocs_settings(fd, &table, false)
Last errno: 2, No such file or directory
Subtest mocs-settings-blt: SKIP
Comment 1 CI Bug Log 2019-01-10 14:24:21 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* ICL: igt@gem_mocs_settings@* - skip - Test requirement: get_mocs_settings(fd, &table, false), Last errno: 2, No such file or directory
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/igt@gem_mocs_settings@mocs-settings-blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/igt@gem_mocs_settings@mocs-settings-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/igt@gem_mocs_settings@mocs-rc6-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/igt@gem_mocs_settings@mocs-rc6-blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/igt@gem_mocs_settings@mocs-settings-dirty-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb5/igt@gem_mocs_settings@mocs-reset-ctx-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb5/igt@gem_mocs_settings@mocs-rc6-ctx-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb5/igt@gem_mocs_settings@mocs-rc6-ctx-dirty-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_mocs_settings@mocs-reset-dirty-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_mocs_settings@mocs-settings-ctx-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_mocs_settings@mocs-settings-ctx-dirty-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_mocs_settings@mocs-settings-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_mocs_settings@mocs-rc6-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_mocs_settings@mocs-reset-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_mocs_settings@mocs-reset-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_mocs_settings@mocs-rc6-dirty-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_mocs_settings@mocs-reset-blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_mocs_settings@mocs-reset-ctx-dirty-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_3578/shard-iclb2/igt@gem_mocs_settings@mocs-settings-ctx-dirty-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_3578/shard-iclb2/igt@gem_mocs_settings@mocs-reset-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_3578/shard-iclb2/igt@gem_mocs_settings@mocs-reset-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_3578/shard-iclb2/igt@gem_mocs_settings@mocs-rc6-dirty-render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_3578/shard-iclb5/igt@gem_mocs_settings@mocs-settings-blt.html
Comment 2 prathap.kumar.valsan 2019-02-14 16:07:48 UTC
Test fails on icelake as corresponding mocs table is not there in the test.
A patch has been posted for review.
Comment 3 prathap.kumar.valsan 2019-03-08 22:14:51 UTC
Making progress. There were discussion on the expected behavior of this test on icelake and we should be able to  fix this BUG by next week.
Comment 4 Chris Wilson 2019-03-19 09:41:03 UTC
commit e3faf0fd49b7e3a763bf89e11fb4fdce81839da2 (HEAD, upstream/master)
Author: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
Date:   Fri Mar 15 15:15:55 2019 -0400

    i915/gem_mocs_settings: Add mocs table for icelake
    
    This patch adds mocs table for icelake with expected L3 and eDRAM
    control values.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109287
    Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
    Reviewed-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
    Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Comment 5 Martin Peres 2019-04-17 14:49:16 UTC
(In reply to Chris Wilson from comment #4)
> commit e3faf0fd49b7e3a763bf89e11fb4fdce81839da2 (HEAD, upstream/master)
> Author: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
> Date:   Fri Mar 15 15:15:55 2019 -0400
> 
>     i915/gem_mocs_settings: Add mocs table for icelake
>     
>     This patch adds mocs table for icelake with expected L3 and eDRAM
>     control values.
>     
>     Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109287
>     Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
>     Reviewed-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
>     Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

Thanks!
Comment 6 CI Bug Log 2019-04-17 14:49:22 UTC
The CI Bug Log issue associated to this bug has been archived.

New failures matching the above filters will not be associated to this bug anymore.


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