Bug 109290 - [CI][SHARDS] igt@gem_pwrite@huge-cpu - skip - Estimated that we need 1 objects and 268435457 MiB for the test, but only have 15378 MiB available (RAM) and a maximum of 1617252 objects
Summary: [CI][SHARDS] igt@gem_pwrite@huge-cpu - skip - Estimated that we need 1 object...
Status: CLOSED NOTABUG
Alias: None
Product: DRI
Classification: Unclassified
Component: IGT (show other bugs)
Version: XOrg git
Hardware: Other All
: medium normal
Assignee: Default DRI bug account
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Reported: 2019-01-10 15:22 UTC by Martin Peres
Modified: 2019-01-18 15:41 UTC (History)
0 users

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Description Martin Peres 2019-01-10 15:22:16 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/igt@gem_pwrite@huge-gtt-backwards.html

Starting subtest: huge-gtt-backwards
Test requirement not met in function intel_require_memory, file ../lib/intel_os.c:410:
Test requirement: sufficient_memory
Estimated that we need 1 objects and 268435457 MiB for the test, but only have 15378 MiB available (RAM) and a maximum of 1617252 objects
Subtest huge-gtt-backwards: SKIP (0.308s)

I think we should simply skip on having a 48-bit GTT.
Comment 1 CI Bug Log 2019-01-10 15:22:37 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* ICL: igt@gem_pwrite@huge-cpu - skip - Estimated that we need \d+ objects and \d+ MiB for the test, but only have \d+ MiB available \(RAM\) and a maximum of ...
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/igt@gem_pwrite@huge-cpu-fbr.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb5/igt@gem_pwrite@huge-cpu-forwards.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_pwrite@huge-cpu-random.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_pwrite@huge-cpu-backwards.html
Comment 2 CI Bug Log 2019-01-10 15:24:42 UTC
A CI Bug Log filter associated to this bug has been updated:

{- ICL: igt@gem_pwrite@huge-cpu - skip - Estimated that we need \d+ objects and \d+ MiB for the test, but only have \d+ MiB available \(RAM\) and a maximum of ... -}
{+ ICL: igt@gem_pwrite@huge-* - skip - Estimated that we need \d+ objects and \d+ MiB for the test, but only have \d+ MiB available \(RAM\) and a maximum of ... +}

New failures caught by the filter:

* https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/igt@gem_pwrite@huge-gtt-backwards.html
* https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/igt@gem_pwrite@huge-gtt-random.html
* https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_pwrite@huge-gtt-forwards.html
* https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_pwrite@huge-gtt-fbr.html
Comment 3 Chris Wilson 2019-01-10 15:27:24 UTC
Nah. Give me a machine with 49-bits of memory and I want to test what happens if we have a full 48-bit GTT. (Not that it really matters, since the interesting GTT is the global one, mappable vs non-mappable at a stretch limits.)
Comment 4 CI Bug Log 2019-01-10 15:47:53 UTC
A CI Bug Log filter associated to this bug has been updated:

{- ICL: igt@gem_pwrite@huge-* - skip - Estimated that we need \d+ objects and \d+ MiB for the test, but only have \d+ MiB available \(RAM\) and a maximum of ... -}
{+ ICL: igt@* - skip - Estimated that we need \d+ objects and \d+ MiB for the test, but only have \d+ MiB available \(RAM\) and a maximum of ... +}

New failures caught by the filter:

* https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb5/igt@gem_exec_big.html
* https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_userptr_blits@coherency-sync.html
* https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb6/igt@gem_userptr_blits@coherency-unsync.html
Comment 5 Martin Peres 2019-01-10 20:50:55 UTC
(In reply to Chris Wilson from comment #3)
> Nah. Give me a machine with 49-bits of memory and I want to test what
> happens if we have a full 48-bit GTT. (Not that it really matters, since the
> interesting GTT is the global one, mappable vs non-mappable at a stretch
> limits.)

Hehe :p
Comment 6 Chris Wilson 2019-01-10 21:01:08 UTC
Separate tests for the inspection around the more likely breakpoints of mappable and non-mappable.
Comment 7 Martin Peres 2019-01-18 15:41:14 UTC
(In reply to Chris Wilson from comment #6)
> Separate tests for the inspection around the more likely breakpoints of
> mappable and non-mappable.

Do you want to write the test yourself or should we add it to Francesco's todo list? If the latter, please Cc: him about it for him to create a task :)


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