109455 – [CI][DRMTIP] igt@kms_flip@2x-flip-vs-modeset|panning-vs-hang - incomplete

Bug 109455 - [CI][DRMTIP] igt@kms_flip@2x-flip-vs-modeset|panning-vs-hang - incomplete

Summary: [CI][DRMTIP] igt@kms_flip@2x-flip-vs-modeset|panning-vs-hang - incomplete

Status:	RESOLVED WORKSFORME

Alias:	None

Product:	DRI
Classification:	Unclassified
Component:	DRM/Intel (show other bugs)
Version:	XOrg git
Hardware:	Other All

Importance:	medium normal
Assignee:	Intel GFX Bugs mailing list
QA Contact:	Intel GFX Bugs mailing list

URL:
Whiteboard:
Keywords:

Depends on:
Blocks:

Reported:	2019-01-25 09:53 UTC by Lakshmi
Modified:	2019-03-08 11:01 UTC (History)
CC List:	1 user (show)

See Also:
i915 platform:	ICL
i915 features:	GEM/Other

Attachments

Description Lakshmi 2019-01-25 09:53:34 UTC

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_193/fi-icl-u3/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_194/fi-icl-u3/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

<6> [856.455692] [drm] GPU HANG: ecode 11:0:0xe757fefe, in kms_flip [2057], reason: no progress on rcs0, action: reset
<5> [856.455840] i915 0000:00:02.0: Resetting rcs0 for no progress on rcs0
<7> [856.456786] [drm:drm_mode_setcrtc] [CRTC:135:pipe B]
<7> [856.456822] [drm:drm_mode_setcrtc] [CONNECTOR:211:HDMI-A-2]
<7> [856.475824] [drm:drm_mode_setcrtc] [CRTC:82:pipe A]
<7> [856.476032] [drm:drm_mode_setcrtc] [CONNECTOR:198:DP-1]
<7> [860.415133] missed_breadcrumb rcs0 missed breadcrumb at intel_breadcrumbs_hangcheck+0x51/0x70 [i915]
<7> [860.415200] missed_breadcrumb 	current seqno 3ae2, last 3ae3, hangcheck 3ae2 [1984 ms]
<7> [860.415215] missed_breadcrumb 	Reset count: 14 (global 0)
<7> [860.415228] missed_breadcrumb 	Requests:
<7> [860.415248] missed_breadcrumb 		first  3ae3 [45a:e] prio=3 @ 3959ms: kms_flip[2057]/0
<7> [860.415267] missed_breadcrumb 		last   3ae3 [45a:e] prio=3 @ 3959ms: kms_flip[2057]/0
<7> [860.415286] missed_breadcrumb 		active 3ae3 [45a:e] prio=3 @ 3959ms: kms_flip[2057]/0
<7> [860.415298] missed_breadcrumb 		ring->start:  0x0000b000
<7> [860.415311] missed_breadcrumb 		ring->head:   0x00000450
<7> [860.415322] missed_breadcrumb 		ring->tail:   0x000004c8
<7> [860.415338] missed_breadcrumb 		ring->emit:   0x000004d0
<7> [860.415355] missed_breadcrumb 		ring->space:  0x00003f40
<7> [860.415371] missed_breadcrumb [head 0478, postfix 04a8, tail 04d0, batch 0x00000000_00041000]:
<7> [860.415419] missed_breadcrumb [0000] 7a000004 01144c1c fffff080 00000000 00000000 00000000 04000001 18800101
<7> [860.415435] missed_breadcrumb [0020] 00041000 00000000 04000000 00000000 7a000004 011050a1 fffe00c0 00000000
<7> [860.415448] missed_breadcrumb [0040] 00003ae3 00000000 01000000 04000001 02800000 00000000
<7> [860.415478] missed_breadcrumb 	RING_START: 0x0000b000
<7> [860.415493] missed_breadcrumb 	RING_HEAD:  0x000004a0
<7> [860.415504] missed_breadcrumb 	RING_TAIL:  0x000004c8
<7> [860.415516] missed_breadcrumb 	RING_CTL:   0x00003001
<7> [860.415530] missed_breadcrumb 	RING_MODE:  0x00000000
<7> [860.415540] missed_breadcrumb 	RING_IMR: 00000000
<7> [860.415556] missed_breadcrumb 	ACTHD:  0x00000000_00041fa4
<7> [860.415573] missed_breadcrumb 	BBADDR: 0x00000000_00041429
<7> [860.415590] missed_breadcrumb 	DMA_FADDR: 0x00000000_00041c40
<7> [860.415600] missed_breadcrumb 	IPEIR: 0x00000000
<7> [860.415610] missed_breadcrumb 	IPEHR: 0x18800101
<7> [860.415624] missed_breadcrumb 	Execlist status: 0x00001098 00000040
<7> [860.415637] missed_breadcrumb 	Execlist CSB read 2, write 2 [mmio:2], tasklet queued? no (enabled)
<7> [860.415653] missed_breadcrumb 		ELSP[0] count=1, ring->start=0000b000, rq: 3ae3 [45a:e] prio=3 @ 3959ms: kms_flip[2057]/0
<7> [860.415661] missed_breadcrumb 		ELSP[1] idle
<7> [860.415670] missed_breadcrumb 		HW active? 0x5
<7> [860.415684] missed_breadcrumb 		E 3ae3 [45a:e] prio=3 @ 3959ms: kms_flip[2057]/0
<7> [860.415694] missed_breadcrumb 		Queue priority: -2147483648
<7> [860.415705] missed_breadcrumb 	kms_flip [2057:R] waiting for 3ae3
<7> [860.415712] missed_breadcrumb HWSP:
<7> [860.415726] missed_breadcrumb [0000] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<7> [860.415734] missed_breadcrumb *
<7> [860.415747] missed_breadcrumb [0040] 10000001 00000000 10000018 00000040 10000001 00000000 10000018 00000000
<7> [860.415766] missed_breadcrumb [0060] 10000001 00000000 10000018 00000040 00000000 00000000 00000000 00000000
<7> [860.415783] missed_breadcrumb [0080] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<7> [860.415800] missed_breadcrumb [00a0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000002
<7> [860.415817] missed_breadcrumb [00c0] 00003ae2 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<7> [860.415834] missed_breadcrumb [00e0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<7> [860.415845] missed_breadcrumb *
<7> [860.415860] missed_breadcrumb Idle? no
<6> [872.455062] [drm] GPU HANG: ecode 11:0:0xe757fefe, in kms_flip [2057], reason: no progress on rcs0, action: reset
<5> [872.455213] i915 0000:00:02.0: Resetting rcs0 for no progress on rcs0
<7> [872.455885] [drm:skl_compute_wm [i915]] [PLANE:30:plane 1A] ddb (0 - 1016) -> (0 - 0)
<7> [872.455954] [drm:skl_compute_wm [i915]] [PLANE:83:plane 1B] ddb (1024 - 2040) -> (0 - 0)
<7> [872.473108] [drm:drm_mode_addfb2] [FB:263]
<7> [872.473213] [drm:drm_mode_addfb2] [FB:298]
<7> [872.561493] [drm:drm_mode_setcrtc] [CRTC:82:pipe A]
<7> [872.561615] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 307200 kHz, actual 307200 kHz
<7> [872.561654] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 0, actual 0
<7> [872.561728] [drm:skl_compute_wm [i915]] [PLANE:79:cursor A] ddb (1016 - 1024) -> (0 - 0)
<7> [872.561752] [drm:skl_compute_wm [i915]] [PLANE:132:cursor B] ddb (2040 - 2048) -> (992 - 1024)
<7> [872.561882] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
<7> [872.561963] [drm:intel_disable_pipe [i915]] disabling pipe A
<7> [872.580184] [drm:intel_power_well_disable [i915]] disabling DDI B IO
<7> [872.580217] [drm:intel_power_well_disable [i915]] disabling AUX B
<7> [872.580294] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
<7> [872.580335] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 82
<7> [872.580380] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
<7> [872.580426] [drm:intel_atomic_commit_tail [i915]] [ENCODER:189:DDI A]
<7> [872.580460] [drm:intel_atomic_commit_tail [i915]] [ENCODER:197:DDI B]
<7> [872.580495] [drm:intel_atomic_commit_tail [i915]] [ENCODER:199:DP-MST A]
<7> [872.580526] [drm:intel_atomic_commit_tail [i915]] [ENCODER:200:DP-MST B]
<7> [872.580556] [drm:intel_atomic_commit_tail [i915]] [ENCODER:201:DP-MST C]
<7> [872.580586] [drm:intel_atomic_commit_tail [i915]] [ENCODER:210:DDI C]
<7> [872.580616] [drm:intel_atomic_commit_tail [i915]] [ENCODER:214:DDI D]
<7> [872.580644] [drm:intel_atomic_commit_tail [i915]] [ENCODER:216:DP-MST A]
<7> [872.580673] [drm:intel_atomic_commit_tail [i915]] [ENCODER:217:DP-MST B]
<7> [872.580701] [drm:intel_atomic_commit_tail [i915]] [ENCODER:218:DP-MST C]
<7> [872.580729] [drm:intel_atomic_commit_tail [i915]] [ENCODER:221:DDI E]
<7> [872.580756] [drm:intel_atomic_commit_tail [i915]] [ENCODER:224:DDI F]
<7> [872.580783] [drm:intel_atomic_commit_tail [i915]] [ENCODER:226:DP-MST A]
<7> [872.580811] [drm:intel_atomic_commit_tail [i915]] [ENCODER:227:DP-MST B]
<7> [872.580838] [drm:intel_atomic_commit_tail [i915]] [ENCODER:228:DP-MST C]
<7> [872.580869] [drm:verify_connector_state.isra.70 [i915]] [CONNECTOR:198:DP-1]
<7> [872.580974] [drm:verify_single_dpll_state.isra.101 [i915]] DPLL 0
<7> [872.581027] [drm:verify_single_dpll_state.isra.101 [i915]] DPLL 1
<7> [872.581073] [drm:verify_single_dpll_state.isra.101 [i915]] TBT PLL
<7> [872.581106] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 1
<7> [872.581155] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 2
<7> [872.581204] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 3
<7> [872.581253] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 4
<7> [872.588936] [drm:intel_atomic_commit_tail [i915]] [CRTC:82:pipe A]
<7> [872.588998] [drm:intel_enable_sagv [i915]] Enabling the SAGV
<7> [872.589129] [drm:drm_mode_setcrtc] [CRTC:135:pipe B]
<7> [872.589239] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 307200 kHz, actual 307200 kHz
<7> [872.589280] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 0, actual 0
<7> [872.589366] [drm:skl_compute_wm [i915]] [PLANE:132:cursor B] ddb (992 - 1024) -> (0 - 0)
<7> [872.589539] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe B
<7> [872.589592] [drm:intel_disable_pipe [i915]] disabling pipe B
<7> [872.606600] [drm:intel_power_well_disable [i915]] disabling DDI C IO
<7> [872.606635] [drm:intel_power_well_disable [i915]] disabling AUX C
<7> [872.606679] [drm:intel_disable_shared_dpll [i915]] disable MG PLL 1 (active 2, on? 1) for crtc 135
<7> [872.606732] [drm:intel_disable_shared_dpll [i915]] disabling MG PLL 1
<7> [872.606777] [drm:intel_atomic_commit_tail [i915]] [ENCODER:189:DDI A]
<7> [872.606813] [drm:intel_atomic_commit_tail [i915]] [ENCODER:197:DDI B]
<7> [872.606848] [drm:intel_atomic_commit_tail [i915]] [ENCODER:199:DP-MST A]
<7> [872.606883] [drm:intel_atomic_commit_tail [i915]] [ENCODER:200:DP-MST B]
<7> [872.606947] [drm:intel_atomic_commit_tail [i915]] [ENCODER:201:DP-MST C]
<7> [872.606981] [drm:intel_atomic_commit_tail [i915]] [ENCODER:210:DDI C]
<7> [872.607021] [drm:intel_atomic_commit_tail [i915]] [ENCODER:214:DDI D]
<7> [872.607067] [drm:intel_atomic_commit_tail [i915]] [ENCODER:216:DP-MST A]
<7> [872.607111] [drm:intel_atomic_commit_tail [i915]] [ENCODER:217:DP-MST B]
<7> [872.607154] [drm:intel_atomic_commit_tail [i915]] [ENCODER:218:DP-MST C]
<7> [872.607196] [drm:intel_atomic_commit_tail [i915]] [ENCODER:221:DDI E]
<7> [872.607240] [drm:intel_atomic_commit_tail [i915]] [ENCODER:224:DDI F]
<7> [872.607278] [drm:intel_atomic_commit_tail [i915]] [ENCODER:226:DP-MST A]
<7> [872.607320] [drm:intel_atomic_commit_tail [i915]] [ENCODER:227:DP-MST B]
<7> [872.607362] [drm:intel_atomic_commit_tail [i915]] [ENCODER:228:DP-MST C]
<7> [872.607406] [drm:verify_connector_state.isra.70 [i915]] [CONNECTOR:211:HDMI-A-2]
<7> [872.607445] [drm:verify_single_dpll_state.isra.101 [i915]] DPLL 0
<7> [872.607478] [drm:verify_single_dpll_state.isra.101 [i915]] DPLL 1
<7> [872.607523] [drm:verify_single_dpll_state.isra.101 [i915]] TBT PLL
<7> [872.607560] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 1
<7> [872.607593] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 2
<7> [872.607623] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 3
<7> [872.607654] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 4
<7> [872.607696] [drm:intel_power_well_disable [i915]] disabling power well 3
<7> [872.607729] [drm:intel_power_well_disable [i915]] disabling power well 2
<7> [872.607774] [drm:intel_atomic_commit_tail [i915]] [CRTC:135:pipe B]
<7> [872.607820] [drm:intel_power_well_disable [i915]] disabling DC off
<7> [872.607848] [drm:skl_enable_dc6 [i915]] Enabling DC6
<7> [872.607877] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
<7> [872.608516] [drm:drm_mode_setcrtc] [CRTC:188:pipe C]
<7> [872.608686] [drm:drm_mode_setcrtc] [CRTC:188:pipe C]
<7> [872.608727] [drm:drm_mode_setcrtc] [CONNECTOR:211:HDMI-A-2]
<7> [872.608815] [drm:intel_atomic_check [i915]] [CONNECTOR:211:HDMI-A-2] Limiting display bpp to 24 instead of EDID bpp 24, requested bpp 36, max platform bpp 36
<7> [872.608871] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
<7> [872.608935] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
<7> [872.608975] [drm:intel_atomic_check [i915]] hw max bpp: 24, pipe bpp: 24, dithering: 0
<7> [872.609017] [drm:intel_dump_pipe_config [i915]] [CRTC:188:pipe C][modeset]
<7> [872.609054] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
<7> [872.609095] [drm:intel_dump_pipe_config [i915]] output format: RGB
<7> [872.609137] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0
<7> [872.609178] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
<7> [872.609216] [drm:intel_dump_pipe_config [i915]] requested mode:
<7> [872.609222] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
<7> [872.609251] [drm:intel_dump_pipe_config [i915]] adjusted mode:
<7> [872.609255] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
<7> [872.609285] [drm:intel_dump_pipe_config [i915]] crtc timings: 241500 2560 2608 2640 2720 1440 1443 1448 1481, type: 0x40 flags: 0x9
<7> [872.609314] [drm:intel_dump_pipe_config [i915]] port clock: 241500, pipe src size: 2560x1440, pixel rate 241500
<7> [872.609354] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
<7> [872.609390] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
<7> [872.609418] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
<7> [872.609453] [drm:icl_dump_hw_state [i915]] dpll_hw_state: cfgcr0: 0x0, cfgcr1: 0x0, mg_refclkin_ctl: 0x100, hg_clktop2_coreclkctl1: 0x500, mg_clktop2_hsclkctl: 0x11100, mg_pll_div0: 0x49a00068, mg_pll_div2: 0x21012, mg_pll_lf: 0x27110804, mg_pll_frac_lock: 0x55553, mg_pll_ssc: 0x8001200, mg_pll_bias: 0x0, mg_pll_tdc_coldst_bias: 0x10000
<7> [872.609486] [drm:intel_dump_pipe_config [i915]] planes on this crtc
<7> [872.609520] [drm:intel_dump_pipe_config [i915]] [PLANE:136:plane 1C] disabled, scaler_id = -1
<7> [872.609553] [drm:intel_dump_pipe_config [i915]] [PLANE:143:plane 2C] disabled, scaler_id = -1
<7> [872.609585] [drm:intel_dump_pipe_config [i915]] [PLANE:150:plane 3C] disabled, scaler_id = -1
<7> [872.609617] [drm:intel_dump_pipe_config [i915]] [PLANE:157:plane 4C] disabled, scaler_id = -1
<7> [872.609654] [drm:intel_dump_pipe_config [i915]] [PLANE:164:plane 5C] disabled, scaler_id = -1
<7> [872.609691] [drm:intel_dump_pipe_config [i915]] [PLANE:171:plane 6C] disabled, scaler_id = -1
<7> [872.609733] [drm:intel_dump_pipe_config [i915]] [PLANE:178:plane 7C] disabled, scaler_id = -1
<7> [872.609774] [drm:intel_dump_pipe_config [i915]] [PLANE:185:cursor C] disabled, scaler_id = -1
<7> [872.609824] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 307200 kHz, actual 307200 kHz
<7> [872.609856] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 0, actual 0
<7> [872.609919] [drm:intel_find_shared_dpll [i915]] [CRTC:188:pipe C] allocated MG PLL 1
<7> [872.609963] [drm:intel_reference_shared_dpll [i915]] using MG PLL 1 for pipe C
<7> [872.610065] [drm:skl_compute_wm [i915]] [PLANE:136:plane 1C] ddb (0 - 0) -> (0 - 992)
<7> [872.610101] [drm:skl_compute_wm [i915]] [PLANE:185:cursor C] ddb (0 - 0) -> (992 - 1024)
<7> [872.618966] [drm:intel_power_well_enable [i915]] enabling DC off
<7> [872.619242] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
<7> [872.619324] [drm:icl_combo_phys_init [i915]] Port A combo PHY already enabled, won't reprogram it.
<7> [872.619387] [drm:icl_combo_phys_init [i915]] Port B combo PHY already enabled, won't reprogram it.
<7> [872.619415] [drm:intel_power_well_enable [i915]] enabling power well 2
<7> [872.619448] [drm:intel_power_well_enable [i915]] enabling power well 3
<7> [872.619492] [drm:intel_power_well_enable [i915]] enabling power well 4
<7> [872.619542] [drm:intel_atomic_commit_tail [i915]] [ENCODER:189:DDI A]
<7> [872.619579] [drm:intel_atomic_commit_tail [i915]] [ENCODER:197:DDI B]
<7> [872.619615] [drm:intel_atomic_commit_tail [i915]] [ENCODER:199:DP-MST A]
<7> [872.619649] [drm:intel_atomic_commit_tail [i915]] [ENCODER:200:DP-MST B]
<7> [872.619685] [drm:intel_atomic_commit_tail [i915]] [ENCODER:201:DP-MST C]
<7> [872.619719] [drm:intel_atomic_commit_tail [i915]] [ENCODER:210:DDI C]
<7> [872.619753] [drm:intel_atomic_commit_tail [i915]] [ENCODER:214:DDI D]
<7> [872.619786] [drm:intel_atomic_commit_tail [i915]] [ENCODER:216:DP-MST A]
<7> [872.619820] [drm:intel_atomic_commit_tail [i915]] [ENCODER:217:DP-MST B]
<7> [872.619854] [drm:intel_atomic_commit_tail [i915]] [ENCODER:218:DP-MST C]
<7> [872.619895] [drm:intel_atomic_commit_tail [i915]] [ENCODER:221:DDI E]
<7> [872.619943] [drm:intel_atomic_commit_tail [i915]] [ENCODER:224:DDI F]
<7> [872.619978] [drm:intel_atomic_commit_tail [i915]] [ENCODER:226:DP-MST A]
<7> [872.620012] [drm:intel_atomic_commit_tail [i915]] [ENCODER:227:DP-MST B]
<7> [872.620044] [drm:intel_atomic_commit_tail [i915]] [ENCODER:228:DP-MST C]
<7> [872.620078] [drm:verify_single_dpll_state.isra.101 [i915]] DPLL 0
<7> [872.620116] [drm:verify_single_dpll_state.isra.101 [i915]] DPLL 1
<7> [872.620150] [drm:verify_single_dpll_state.isra.101 [i915]] TBT PLL
<7> [872.620191] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 1
<7> [872.620232] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 2
<7> [872.620271] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 3
<7> [872.620316] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 4
<7> [872.620359] [drm:intel_power_well_enable [i915]] enabling AUX C
<7> [872.620446] [drm:intel_enable_shared_dpll [i915]] enable MG PLL 1 (active 4, on? 0) for crtc 188
<7> [872.620480] [drm:intel_enable_shared_dpll [i915]] enabling MG PLL 1
<7> [872.620583] [drm:intel_power_well_enable [i915]] enabling DDI C IO
<7> [872.620865] [drm:intel_enable_pipe [i915]] enabling pipe C
<7> [872.621358] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:211:HDMI-A-2], [ENCODER:210:DDI C]
<7> [872.621393] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe C, 32 bytes ELD
<7> [872.621436] [drm:audio_config_hdmi_pixel_clock [i915]] HDMI audio pixel clock setting for 241500 not found, falling back to defaults
<7> [872.621469] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 25200 (0x00010000)
<7> [872.621501] [drm:hsw_audio_config_update [i915]] using automatic N
<7> [872.638293] [drm:verify_connector_state.isra.70 [i915]] [CONNECTOR:211:HDMI-A-2]
<7> [872.638360] [drm:intel_atomic_commit_tail [i915]] [CRTC:188:pipe C]
<7> [872.638438] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 1
<7> [872.638585] [drm:drm_mode_setcrtc] [CRTC:82:pipe A]
<7> [872.638627] [drm:drm_mode_setcrtc] [CONNECTOR:198:DP-1]
<7> [872.638759] [drm:intel_atomic_check [i915]] [CONNECTOR:198:DP-1] Limiting display bpp to 24 instead of EDID bpp 24, requested bpp 36, max platform bpp 36
<7> [872.638805] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max rate 540000 max bpp 24 pixel clock 241500KHz
<7> [872.638842] [drm:intel_dp_compute_config [i915]] Force DSC en = 0
<7> [872.638883] [drm:intel_dp_compute_config [i915]] DP lane count 4 clock 270000 bpp 24
<7> [872.638948] [drm:intel_dp_compute_config [i915]] DP link rate required 724500 available 1080000
<7> [872.638984] [drm:intel_atomic_check [i915]] hw max bpp: 24, pipe bpp: 24, dithering: 0
<7> [872.639025] [drm:intel_dump_pipe_config [i915]] [CRTC:82:pipe A][modeset]
<7> [872.639063] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
<7> [872.639098] [drm:intel_dump_pipe_config [i915]] output format: RGB
<7> [872.639135] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
<7> [872.639174] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5627357, gmch_n: 8388608, link_m: 468946, link_n: 524288, tu: 64
<7> [872.639230] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
<7> [872.639272] [drm:intel_dump_pipe_config [i915]] requested mode:
<7> [872.639280] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
<7> [872.639322] [drm:intel_dump_pipe_config [i915]] adjusted mode:
<7> [872.639329] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
<7> [872.639372] [drm:intel_dump_pipe_config [i915]] crtc timings: 241500 2560 2608 2640 2720 1440 1443 1448 1481, type: 0x40 flags: 0x9
<7> [872.639414] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 2560x1440, pixel rate 241500
<7> [872.639451] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
<7> [872.639482] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
<7> [872.639514] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
<7> [872.639551] [drm:icl_dump_hw_state [i915]] dpll_hw_state: cfgcr0: 0x1c001a5, cfgcr1: 0x8b, mg_refclkin_ctl: 0x0, hg_clktop2_coreclkctl1: 0x0, mg_clktop2_hsclkctl: 0x0, mg_pll_div0: 0x0, mg_pll_div2: 0x0, mg_pll_lf: 0x0, mg_pll_frac_lock: 0x0, mg_pll_ssc: 0x0, mg_pll_bias: 0x0, mg_pll_tdc_coldst_bias: 0x0
<7> [872.639584] [drm:intel_dump_pipe_config [i915]] planes on this crtc
<7> [872.639617] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 1A] disabled, scaler_id = -1
<7> [872.639649] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 2A] disabled, scaler_id = -1
<7> [872.639680] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 3A] disabled, scaler_id = -1
<7> [872.639711] [drm:intel_dump_pipe_config [i915]] [PLANE:51:plane 4A] disabled, scaler_id = -1
<7> [872.639741] [drm:intel_dump_pipe_config [i915]] [PLANE:58:plane 5A] disabled, scaler_id = -1
<7> [872.639771] [drm:intel_dump_pipe_config [i915]] [PLANE:65:plane 6A] disabled, scaler_id = -1
<7> [872.639800] [drm:intel_dump_pipe_config [i915]] [PLANE:72:plane 7A] disabled, scaler_id = -1
<7> [872.639828] [drm:intel_dump_pipe_config [i915]] [PLANE:79:cursor A] disabled, scaler_id = -1
<7> [872.639874] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 307200 kHz, actual 307200 kHz
<7> [872.639935] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 0, actual 0
<7> [872.639980] [drm:intel_find_shared_dpll [i915]] [CRTC:82:pipe A] allocated DPLL 0
<7> [872.640018] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
<7> [872.640134] [drm:skl_compute_wm [i915]] [PLANE:30:plane 1A] ddb (0 - 0) -> (0 - 1016)
<7> [872.640171] [drm:skl_compute_wm [i915]] [PLANE:79:cursor A] ddb (0 - 0) -> (1016 - 1024)
<7> [872.640208] [drm:skl_compute_wm [i915]] [PLANE:136:plane 1C] ddb (0 - 992) -> (1024 - 2040)
<7> [872.640244] [drm:skl_compute_wm [i915]] [PLANE:185:cursor C] ddb (992 - 1024) -> (2040 - 2048)
<7> [872.640361] [drm:intel_disable_sagv [i915]] Disabling the SAGV
<7> [872.640427] [drm:intel_atomic_commit_tail [i915]] [ENCODER:189:DDI A]
<7> [872.640476] [drm:intel_atomic_commit_tail [i915]] [ENCODER:197:DDI B]
<7> [872.640522] [drm:intel_atomic_commit_tail [i915]] [ENCODER:199:DP-MST A]
<7> [872.640566] [drm:intel_atomic_commit_tail [i915]] [ENCODER:200:DP-MST B]
<7> [872.640610] [drm:intel_atomic_commit_tail [i915]] [ENCODER:201:DP-MST C]
<7> [872.640653] [drm:intel_atomic_commit_tail [i915]] [ENCODER:210:DDI C]
<7> [872.640684] [drm:intel_atomic_commit_tail [i915]] [ENCODER:214:DDI D]
<7> [872.640714] [drm:intel_atomic_commit_tail [i915]] [ENCODER:216:DP-MST A]
<7> [872.640743] [drm:intel_atomic_commit_tail [i915]] [ENCODER:217:DP-MST B]
<7> [872.640772] [drm:intel_atomic_commit_tail [i915]] [ENCODER:218:DP-MST C]
<7> [872.640804] [drm:intel_atomic_commit_tail [i915]] [ENCODER:221:DDI E]
<7> [872.640836] [drm:intel_atomic_commit_tail [i915]] [ENCODER:224:DDI F]
<7> [872.640875] [drm:intel_atomic_commit_tail [i915]] [ENCODER:226:DP-MST A]
<7> [872.640937] [drm:intel_atomic_commit_tail [i915]] [ENCODER:227:DP-MST B]
<7> [872.640971] [drm:intel_atomic_commit_tail [i915]] [ENCODER:228:DP-MST C]
<7> [872.641006] [drm:verify_single_dpll_state.isra.101 [i915]] DPLL 0
<7> [872.641044] [drm:verify_single_dpll_state.isra.101 [i915]] DPLL 1
<7> [872.641082] [drm:verify_single_dpll_state.isra.101 [i915]] TBT PLL
<7> [872.641117] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 1
<7> [872.641168] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 2
<7> [872.641213] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 3
<7> [872.641259] [drm:verify_single_dpll_state.isra.101 [i915]] MG PLL 4
<7> [872.654838] [drm:intel_power_well_enable [i915]] enabling AUX B
<7> [872.654895] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 82
<7> [872.654994] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
<7> [872.655123] [drm:intel_power_well_enable [i915]] enabling DDI B IO
<7> [872.655977] [drm:intel_dp_start_link_train [i915]] Using LINK_BW_SET value 0a
<7> [872.656376] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
<7> [872.656414] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
<7> [872.656456] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
<7> [872.657331] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
<7> [872.657370] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
<7> [872.658062] [drm:intel_dp_start_link_train [i915]] clock recovery OK
<7> [872.658118] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
<7> [872.659161] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
<7> [872.659206] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
<7> [872.660200] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
<7> [872.660410] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:198:DP-1] Link Training Passed at Link Rate = 270000, Lane count = 4
<7> [872.660718] [drm:intel_enable_pipe [i915]] enabling pipe A
<7> [872.660795] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
<7> [872.660848] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:198:DP-1], [ENCODER:197:DDI B]
<7> [872.660899] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 36 bytes ELD
<7> [872.660984] [drm:hsw_audio_config_update [i915]] using automatic Maud, Naud
<7> [872.661050] [drm:intel_fbc_enable [i915]] reserved 29491200 bytes of contiguous stolen space for FBC, threshold: 1
<7> [872.661098] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
<7> [872.677614] [drm:verify_connector_state.isra.70 [i915]] [CONNECTOR:198:DP-1]
<7> [872.677706] [drm:intel_atomic_commit_tail [i915]] [CRTC:82:pipe A]
<7> [872.677793] [drm:verify_single_dpll_state.isra.101 [i915]] DPLL 0
<7> [872.694585] [drm:drm_mode_setcrtc] [CRTC:188:pipe C]
<7> [872.694638] [drm:drm_mode_setcrtc] [CONNECTOR:211:HDMI-A-2]
<7> [872.721686] [drm:drm_mode_setcrtc] [CRTC:82:pipe A]
<7> [872.721733] [drm:drm_mode_setcrtc] [CONNECTOR:198:DP-1]
<7> [876.414957] missed_breadcrumb rcs0 missed breadcrumb at intel_breadcrumbs_hangcheck+0x51/0x70 [i915]
<7> [876.414961] missed_breadcrumb 	current seqno 3ae3, last 3ae4, hangcheck 3ae3 [1984 ms]
<7> [876.414963] missed_breadcrumb 	Reset count: 15 (global 0)
<7> [876.414966] missed_breadcrumb 	Requests:
<7> [876.414970] missed_breadcrumb 		first  3ae4 [45a:f] prio=3 @ 3721ms: kms_flip[2057]/0
<7> [876.414973] missed_breadcrumb 		last   3ae4 [45a:f] prio=3 @ 3721ms: kms_flip[2057]/0
<7> [876.414976] missed_breadcrumb 		active 3ae4 [45a:f] prio=3 @ 3721ms: kms_flip[2057]/0
<7> [876.414979] missed_breadcrumb 		ring->start:  0x0000b000
<7> [876.414980] missed_breadcrumb 		ring->head:   0x000004a8
<7> [876.414982] missed_breadcrumb 		ring->tail:   0x00000520
<7> [876.414984] missed_breadcrumb 		ring->emit:   0x00000528
<7> [876.414986] missed_breadcrumb 		ring->space:  0x00003f40
<7> [876.414989] missed_breadcrumb [head 04d0, postfix 0500, tail 0528, batch 0x00000000_00040000]:
<7> [876.415010] missed_breadcrumb [0000] 7a000004 01144c1c fffff080 00000000 00000000 00000000 04000001 18800101
<7> [876.415013] missed_breadcrumb [0020] 00040000 00000000 04000000 00000000 7a000004 011050a1 fffe00c0 00000000
<7> [876.415016] missed_breadcrumb [0040] 00003ae4 00000000 01000000 04000001 02800000 00000000
<7> [876.415032] missed_breadcrumb 	RING_START: 0x0000b000
<7> [876.415037] missed_breadcrumb 	RING_HEAD:  0x000004f8
<7> [876.415042] missed_breadcrumb 	RING_TAIL:  0x00000520
<7> [876.415048] missed_breadcrumb 	RING_CTL:   0x00003001
<7> [876.415053] missed_breadcrumb 	RING_MODE:  0x00000000
<7> [876.415056] missed_breadcrumb 	RING_IMR: 00000000
<7> [876.415064] missed_breadcrumb 	ACTHD:  0x00000000_00040910
<7> [876.415070] missed_breadcrumb 	BBADDR: 0x00000000_00040579
<7> [876.415077] missed_breadcrumb 	DMA_FADDR: 0x00000000_00040340
<7> [876.415081] missed_breadcrumb 	IPEIR: 0x00000000
<7> [876.415084] missed_breadcrumb 	IPEHR: 0x18800101
<7> [876.415090] missed_breadcrumb 	Execlist status: 0x00001098 00000040
<7> [876.415094] missed_breadcrumb 	Execlist CSB read 2, write 2 [mmio:2], tasklet queued? no (enabled)
<7> [876.415098] missed_breadcrumb 		ELSP[0] count=1, ring->start=0000b000, rq: 3ae4 [45a:f] prio=3 @ 3721ms: kms_flip[2057]/0
<7> [876.415100] missed_breadcrumb 		ELSP[1] idle
<7> [876.415102] missed_breadcrumb 		HW active? 0x5
<7> [876.415106] missed_breadcrumb 		E 3ae4 [45a:f] prio=3 @ 3721ms: kms_flip[2057]/0
<7> [876.415108] missed_breadcrumb 		Queue priority: -2147483648
<7> [876.415111] missed_breadcrumb 	kms_flip [2057:R] waiting for 3ae4
<7> [876.415114] missed_breadcrumb HWSP:
<7> [876.415117] missed_breadcrumb [0000] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<7> [876.415118] missed_breadcrumb *
<7> [876.415122] missed_breadcrumb [0040] 10000001 00000000 10000018 00000040 10000001 00000000 10000018 00000000
<7> [876.415125] missed_breadcrumb [0060] 10000001 00000000 10000018 00000040 00000000 00000000 00000000 00000000
<7> [876.415128] missed_breadcrumb [0080] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<7> [876.415131] missed_breadcrumb [00a0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000002
<7> [876.415134] missed_breadcrumb [00c0] 00003ae3 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<7> [876.415137] missed_breadcrumb [00e0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<7> [876.415138] missed_breadcrumb *

Comment 1 CI Bug Log 2019-01-25 10:01:43 UTC

The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* ICL: igt@kms_flip@2x-flip-vs-panning-vs-hang - incomplete - missed_breadcrumb rcs0 missed breadcrumb at intel_breadcrumbs_hangcheck
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_190/fi-icl-u3/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_193/fi-icl-u3/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_194/fi-icl-u3/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

Comment 2 CI Bug Log 2019-01-25 10:04:03 UTC

A CI Bug Log filter associated to this bug has been updated:

{- ICL: igt@kms_flip@2x-flip-vs-panning-vs-hang - incomplete - missed_breadcrumb rcs0 missed breadcrumb at intel_breadcrumbs_hangcheck -}
{+ ICL: igt@kms_flip@2x-flip-vs-panning-vs-hang - incomplete - missed_breadcrumb rcs0 missed breadcrumb at intel_breadcrumbs_hangcheck +}

 No new failures caught with the new filter

Comment 3 Francesco Balestrieri 2019-02-11 11:19:29 UTC

Last seen 700 runs ago, before that 3 times at 30 runs intervals. Resolving.

Comment 4 CI Bug Log 2019-03-08 11:01:37 UTC

The CI Bug Log issue associated to this bug has been archived.

New failures matching the above filters will not be associated to this bug anymore.

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