Bug 110215 - [CI][SHARDS] igt@kms_psr* - fail - Failed assertion: psr_wait_entry_if_enabled(&data) / Failed assertion: psr_wait_entry_if_enabled(data)
Summary: [CI][SHARDS] igt@kms_psr* - fail - Failed assertion: psr_wait_entry_if_enable...
Status: RESOLVED NOTABUG
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: DRI git
Hardware: Other All
: high normal
Assignee: Jose Roberto de Souza
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks:
 
Reported: 2019-03-21 08:05 UTC by Lakshmi
Modified: 2019-04-30 10:22 UTC (History)
4 users (show)

See Also:
i915 platform: ICL
i915 features: display/PSR


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Description Lakshmi 2019-03-21 08:05:20 UTC
Here are few failures.

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5784/shard-iclb8/igt@kms_psr@dpms.html
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5784/shard-iclb8/igt@kms_psr@primary_render.html
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5784/shard-iclb8/igt@kms_psr@sprite_render.html
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5784/shard-iclb8/igt@kms_psr@cursor_plane_onoff.html

Starting subtest: cursor_plane_onoff
(kms_psr:1457) CRITICAL: Test assertion failure function test_setup, file ../tests/kms_psr.c:394:
(kms_psr:1457) CRITICAL: Failed assertion: psr_wait_entry_if_enabled(data)
Subtest cursor_plane_onoff failed.
**** DEBUG ****
Comment 1 CI Bug Log 2019-03-21 08:08:28 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* ICL:  igt@kms_psr* - fail - Failed assertion: psr_wait_entry_if_enabled(&data) / Failed assertion: psr_wait_entry_if_enabled(data) (No new failures associated)
Comment 2 Jose Roberto de Souza 2019-04-05 23:52:11 UTC
The PSR setup time of this panel is too long:

<7> [3092.187854] [drm:intel_dp_compute_config [i915]] PSR condition failed: PSR setup time (330 us) too long

We have 2 options here, replace the panel or whitelist PSR tests in this iclb8 shard.
Comment 3 Lakshmi 2019-04-11 09:59:16 UTC
Jose/DK, Can you please check if this bug needs to be split?
Current filter catches failures with  
"Failed assertion: psr_wait_entry_if_enabled(data)" or
"Failed assertion: psr_wait_entry_if_enabled(&data)"
Comment 4 Jose Roberto de Souza 2019-04-11 17:28:13 UTC
All the fails:

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5784/shard-iclb8/igt@kms_psr@dpms.html
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5784/shard-iclb8/igt@kms_psr@primary_render.html
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5784/shard-iclb8/igt@kms_psr@sprite_render.html
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5784/shard-iclb8/igt@kms_psr@cursor_plane_onoff.html

Are due:

<7> [3092.187854] [drm:intel_dp_compute_config [i915]] PSR condition failed: PSR setup time (330 us) too long

So this is not a bug, PSR tests should be whitelisted on shard-iclb8 or the panel replaced.
Comment 5 Jani Saarinen 2019-04-22 15:26:46 UTC
For this panel was changed, ok now?
Comment 6 Jose Roberto de Souza 2019-04-22 16:52:47 UTC
It is working but this panel only supports PSR1:

https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12853/shard-iclb8/igt%40kms_psr%40primary_render.html

https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12853/shard-iclb8/boot3.log
<7>[   10.800868] [drm:intel_psr_init_dpcd [i915]] eDP panel supports PSR version 1
Comment 7 James Ausmus 2019-04-22 17:08:19 UTC
Marking this as Resolved, Not a bug, as this was a panel issue
Comment 8 CI Bug Log 2019-04-30 10:22:46 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* CML: igt@kms_psr@* - fail - Failed assertion: psr_wait_entry_if_enabled(data)
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@basic.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@cursor_blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@cursor_mmap_cpu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@cursor_mmap_gtt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@cursor_plane_move.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@cursor_plane_onoff.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@cursor_render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@dpms.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@no_drrs.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@primary_blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@primary_mmap_cpu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@primary_mmap_gtt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@primary_page_flip.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@primary_render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@sprite_blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@sprite_mmap_cpu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@sprite_mmap_gtt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@sprite_plane_move.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@sprite_plane_onoff.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@sprite_render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6001/re-cml-u/igt@kms_psr@suspend.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_basic.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_cursor_blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_cursor_mmap_cpu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_cursor_mmap_gtt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_cursor_plane_move.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_cursor_plane_onoff.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_cursor_render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_dpms.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_no_drrs.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_primary_blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_primary_mmap_cpu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_primary_mmap_gtt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_primary_page_flip.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_primary_render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_sprite_blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_sprite_mmap_cpu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_sprite_mmap_gtt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_sprite_plane_move.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_sprite_plane_onoff.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_sprite_render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@kms_psr@psr2_suspend.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_basic.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_cursor_blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_cursor_mmap_cpu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_cursor_mmap_gtt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_cursor_plane_move.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_cursor_plane_onoff.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_cursor_render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_dpms.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_no_drrs.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_primary_blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_primary_mmap_cpu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_primary_mmap_gtt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_primary_page_flip.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_primary_render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_sprite_blt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_sprite_mmap_cpu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_sprite_mmap_gtt.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_sprite_plane_move.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_sprite_plane_onoff.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_sprite_render.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@kms_psr@psr2_suspend.html


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