The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* BDW igt@gem_exec_schedule@semaphore-user - warn - Failed assertion: !"GPU hung"
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_249/fi-bdw-5557u/igt@gem_exec_schedule@semaphore-user.html

commit bac24f59f45419a3853af2f58130cb82b7bdca64
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Fri Mar 29 13:40:24 2019 +0000

    drm/i915/execlists: Enable coarse preemption boundaries for gen8
    
    When we introduced preemption, we chose to keep it disabled for gen8 as
    supporting preemption inside GPGPU user batches required various w/a in
    userspace. Since then, the desire to preempt long queues of requests
    between batches (e.g. within busywaiting semaphores) has grown. So allow
    arbitration within the busywaits and between requests, but disable
    arbitration within user batches so that we can preempt between requests
    and not risk breaking GPGPU.
    
    However, since this preemption is much coarser and doesn't interfere
    with userspace, we decline to include it amongst the scheduler
    capabilities. (This is also required for us to skip over the preemption
    selftests that expect to be able to preempt user batches.)
    
    Michal suggested that we could perhaps allow preemption inside gen8
    userspace batches if we can satisfy ourselves that the default
    preemption settings are viable with existing userspace (principally
    OpenCL which already should carry any known workaround). We could then
    merge the two code paths back into one, even dropping the artifical
    has-preemption device feature flag.
    
    Testcase: igt/gem_exec_scheduler/semaphore-user
    References: beecec901790 ("drm/i915/execlists: Preemption!")
    Fixes: e88619646971 ("drm/i915: Use HW semaphores for inter-engine synchronisation on gen8+")
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Cc: Michal Winiarski <michal.winiarski@intel.com>
    Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
    Reviewed-by: Michal Winiarski <michal.winiarski@intel.com> #irc
    Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20190329134024.5254-1-chris@chris-wilson.co.uk

A CI Bug Log filter associated to this bug has been updated:

{- BDW igt@gem_exec_schedule@semaphore-user - warn - Failed assertion: !"GPU hung" -}
{+ BSW BDW igt@gem_exec_schedule@semaphore-user - warn/fail - Failed assertion: !"GPU hung" +}

New failures caught by the filter:

* https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_249/fi-bsw-n3050/igt@gem_exec_schedule@semaphore-user.html

(In reply to CI Bug Log from comment #3)
> A CI Bug Log filter associated to this bug has been updated:
> 
> {- BDW igt@gem_exec_schedule@semaphore-user - warn - Failed assertion:
> !"GPU hung" -}
> {+ BSW BDW igt@gem_exec_schedule@semaphore-user - warn/fail - Failed
> assertion: !"GPU hung" +}
> 
> New failures caught by the filter:
> 
> *
> https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_249/fi-bsw-n3050/
> igt@gem_exec_schedule@semaphore-user.html

Also seen on BSW.

(In reply to Chris Wilson from comment #2)
> commit bac24f59f45419a3853af2f58130cb82b7bdca64
> Author: Chris Wilson <chris@chris-wilson.co.uk>
> Date:   Fri Mar 29 13:40:24 2019 +0000
> 
>     drm/i915/execlists: Enable coarse preemption boundaries for gen8
>     
>     When we introduced preemption, we chose to keep it disabled for gen8 as
>     supporting preemption inside GPGPU user batches required various w/a in
>     userspace. Since then, the desire to preempt long queues of requests
>     between batches (e.g. within busywaiting semaphores) has grown. So allow
>     arbitration within the busywaits and between requests, but disable
>     arbitration within user batches so that we can preempt between requests
>     and not risk breaking GPGPU.
>     
>     However, since this preemption is much coarser and doesn't interfere
>     with userspace, we decline to include it amongst the scheduler
>     capabilities. (This is also required for us to skip over the preemption
>     selftests that expect to be able to preempt user batches.)
>     
>     Michal suggested that we could perhaps allow preemption inside gen8
>     userspace batches if we can satisfy ourselves that the default
>     preemption settings are viable with existing userspace (principally
>     OpenCL which already should carry any known workaround). We could then
>     merge the two code paths back into one, even dropping the artifical
>     has-preemption device feature flag.
>     
>     Testcase: igt/gem_exec_scheduler/semaphore-user
>     References: beecec901790 ("drm/i915/execlists: Preemption!")
>     Fixes: e88619646971 ("drm/i915: Use HW semaphores for inter-engine
> synchronisation on gen8+")
>     Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>     Cc: Michal Winiarski <michal.winiarski@intel.com>
>     Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>     Reviewed-by: Michal Winiarski <michal.winiarski@intel.com> #irc
>     Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>     Link:
> https://patchwork.freedesktop.org/patch/msgid/20190329134024.5254-1-
> chris@chris-wilson.co.uk

Thanks, the bug was seen twice on one drmtip run, and not for the following 6 runs. This means we are over the 10x rule and can consider this fixed. Thanks!

The CI Bug Log issue associated to this bug has been archived.

New failures matching the above filters will not be associated to this bug anymore.