Bug 110559 - [CI][DRMTIP] igt@gem_ctx_sseu - skip - Test requirement: kernel_has_per_context_sseu_support(fd), SKIP
Summary: [CI][DRMTIP] igt@gem_ctx_sseu - skip - Test requirement: kernel_has_per_conte...
Status: REOPENED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: XOrg git
Hardware: Other All
: lowest normal
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks:
 
Reported: 2019-04-30 08:18 UTC by Martin Peres
Modified: 2019-09-09 10:53 UTC (History)
1 user (show)

See Also:
i915 platform: CML, TGL
i915 features: GEM/Other


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Description Martin Peres 2019-04-30 08:18:26 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_267/fi-cml-u/igt@gem_ctx_sseu@invalid-sseu.html

Test requirement: kernel_has_per_context_sseu_support(fd)
Subtest invalid-sseu: SKIP
Comment 1 CI Bug Log 2019-04-30 08:19:01 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* CML: igt@gem_ctx_sseu - skip - Test requirement: kernel_has_per_context_sseu_support(fd), SKIP
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_267/fi-cml-u/igt@gem_ctx_sseu@invalid-sseu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_267/fi-cml-u/igt@gem_ctx_sseu@ggtt-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_267/fi-cml-u/igt@gem_ctx_sseu@engines.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_267/fi-cml-u/igt@gem_ctx_sseu@invalid-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_268/fi-cml-u/igt@gem_ctx_sseu@invalid-sseu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_268/fi-cml-u/igt@gem_ctx_sseu@ggtt-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_268/fi-cml-u/igt@gem_ctx_sseu@engines.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_268/fi-cml-u/igt@gem_ctx_sseu@invalid-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_269/fi-cml-u/igt@gem_ctx_sseu@invalid-sseu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_269/fi-cml-u/igt@gem_ctx_sseu@ggtt-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_269/fi-cml-u/igt@gem_ctx_sseu@engines.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_269/fi-cml-u/igt@gem_ctx_sseu@invalid-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_270/fi-cml-u/igt@gem_ctx_sseu@invalid-sseu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_270/fi-cml-u/igt@gem_ctx_sseu@ggtt-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_270/fi-cml-u/igt@gem_ctx_sseu@engines.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_270/fi-cml-u/igt@gem_ctx_sseu@invalid-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@gem_ctx_sseu@engines.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@gem_ctx_sseu@ggtt-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@gem_ctx_sseu@invalid-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6010/re-cml-u/igt@gem_ctx_sseu@invalid-sseu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_270/fi-cml-u2/igt@gem_ctx_sseu@invalid-sseu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_270/fi-cml-u2/igt@gem_ctx_sseu@ggtt-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_270/fi-cml-u2/igt@gem_ctx_sseu@engines.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@gem_ctx_sseu@engines.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@gem_ctx_sseu@ggtt-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@gem_ctx_sseu@invalid-args.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6012/re-cml-u/igt@gem_ctx_sseu@invalid-sseu.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_270/fi-cml-u2/igt@gem_ctx_sseu@invalid-args.html
Comment 2 Martin Peres 2019-09-09 10:52:21 UTC
Re-opening as lowest priority because this interface is only implemented for ICL, and not yet generic-enough for all platforms:

<mupuf> ickle: shouldn't CML and TGL support SSEU?
<ickle> the registers are there
<ickle> the current uapi exists to prevent a gen11 hang
<ickle> and even that was only required because the promised media instructions did not work
<ickle> the dream was that would be justification to produce a more general interface
Comment 3 CI Bug Log 2019-09-09 10:53:13 UTC
A CI Bug Log filter associated to this bug has been updated:

{- CML: igt@gem_ctx_sseu - skip - Test requirement: kernel_has_per_context_sseu_support(fd), SKIP -}
{+ CML TGL: igt@gem_ctx_sseu - skip - Test requirement: kernel_has_per_context_sseu_support(fd), SKIP +}

New failures caught by the filter:

  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_363/fi-tgl-u/igt@gem_ctx_sseu@invalid-args.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_363/fi-tgl-u/igt@gem_ctx_sseu@ggtt-args.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_363/fi-tgl-u/igt@gem_ctx_sseu@invalid-sseu.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_364/fi-tgl-u/igt@gem_ctx_sseu@invalid-args.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_364/fi-tgl-u/igt@gem_ctx_sseu@ggtt-args.html


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