Bug 110767 - [CI][SHARDS] igt@perf_pmu@busy-idle-check-all-vcs0 - fail - Failed assertion: (double)(val[i]) <= (1.0 + (tolerance)) * (double)(0.0f) && (double)(val[i]) >= (1.0 - (tolerance)) * (double)(0.0f)
Summary: [CI][SHARDS] igt@perf_pmu@busy-idle-check-all-vcs0 - fail - Failed assertion:...
Status: RESOLVED WORKSFORME
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: XOrg git
Hardware: Other All
: high normal
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks:
 
Reported: 2019-05-27 10:37 UTC by Martin Peres
Modified: 2019-05-28 11:14 UTC (History)
1 user (show)

See Also:
i915 platform: SNB
i915 features: Perf/PMU


Attachments

Description Martin Peres 2019-05-27 10:37:13 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13098/shard-snb6/igt@perf_pmu@busy-idle-check-all-vcs0.html

Starting subtest: busy-idle-check-all-vcs0
(perf_pmu:4625) CRITICAL: Test assertion failure function busy_check_all, file ../tests/perf_pmu.c:479:
(perf_pmu:4625) CRITICAL: Failed assertion: (double)(val[i]) <= (1.0 + (tolerance)) * (double)(0.0f) && (double)(val[i]) >= (1.0 - (tolerance)) * (double)(0.0f)
(perf_pmu:4625) CRITICAL: 'val[i]' != '0.0f' (5000008.000000 not within +5.000000%/-5.000000% tolerance of 0.000000)
Subtest busy-idle-check-all-vcs0 failed.
Comment 1 CI Bug Log 2019-05-27 10:39:14 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* SNB: igt@perf_pmu@busy-idle-check-all-vcs0 - fail - Failed assertion: (double)(val[i]) &lt;= (1.0 + (tolerance)) * (double)(0.0f) &amp;&amp; (double)(val[i]) &gt;= (1.0 - (tolerance)) * (double)(0.0f)
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13098/shard-snb6/igt@perf_pmu@busy-idle-check-all-vcs0.html
Comment 2 Chris Wilson 2019-05-28 11:14:56 UTC
In a loop for 12 hours on snb, not a single failure. I did suspect it may have been fallout from the engine map overhaul, but that would have been consistent.


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