https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6163/shard-iclb1/igt@gem_workarounds@reset.html Starting subtest: reset (gem_workarounds:1319) WARNING: 0x0E5F4 0x00100010 0x00000010 0x00180020 FAIL (gem_workarounds:1319) CRITICAL: Test assertion failure function check_workarounds, file ../tests/i915/gem_workarounds.c:138: (gem_workarounds:1319) CRITICAL: Failed assertion: workaround_fail_count(fd, ctx) == 0 (gem_workarounds:1319) CRITICAL: error: 1 != 0
commit f414756be2ac57e194919973da7b86644ba61241 (origin/master, origin/HEAD) Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Sat May 25 08:04:53 2019 +0100 i915/gem_workarounds: Verify regs directly It seems like the HW validator is getting better at preventing our snooping of system registers from non-privileged batches! If we can't use SRM, let's probe the register directly through mmio, making sure we have the context spinning on the GPU first. v2: Hold forcewake just in case the spinning batch isn't enough to justify our register access. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110544 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Auld <matthew.william.auld@gmail.com> Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
The CI Bug Log issue associated to this bug has been updated. ### New filters associated * ICL: igt@gem_workarounds@* - fail - WARNING: 0x0E5F4 0x00100010 0x00000010 0x00180020 FAIL - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6163/shard-iclb1/igt@gem_workarounds@reset.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6163/shard-iclb2/igt@gem_workarounds@basic-read-context.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13124/shard-iclb1/igt@gem_workarounds@basic-read-context.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13124/shard-iclb1/igt@gem_workarounds@suspend-resume-fd.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13124/shard-iclb1/igt@gem_workarounds@basic-read-fd.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13125/shard-iclb1/igt@gem_workarounds@reset-context.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13125/shard-iclb1/igt@gem_workarounds@suspend-resume-fd.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13125/shard-iclb1/igt@gem_workarounds@basic-read-fd.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13125/shard-iclb2/igt@gem_workarounds@reset-fd.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13125/shard-iclb2/igt@gem_workarounds@basic-read.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6164/shard-iclb1/igt@gem_workarounds@reset-context.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6164/shard-iclb2/igt@gem_workarounds@suspend-resume-context.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6164/shard-iclb2/igt@gem_workarounds@suspend-resume-fd.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6164/shard-iclb2/igt@gem_workarounds@basic-read-fd.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb1/igt@gem_workarounds@basic-read-context.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb2/igt@gem_workarounds@reset-fd.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13134/shard-iclb2/igt@gem_workarounds@reset-fd.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb1/igt@gem_workarounds@reset-context.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb2/igt@gem_workarounds@suspend-resume-context.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6167/shard-iclb2/igt@gem_workarounds@reset-fd.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6167/shard-iclb2/igt@gem_workarounds@basic-read.html - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3080/shard-iclb1/igt@gem_workarounds@basic-read-context.html - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3080/shard-iclb1/igt@gem_workarounds@suspend-resume.html - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3080/shard-iclb2/igt@gem_workarounds@reset.html - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3058/shard-iclb1/igt@gem_workarounds@basic-read.html - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3058/shard-iclb1/igt@gem_workarounds@basic-read-fd.html
(In reply to Chris Wilson from comment #1) > commit f414756be2ac57e194919973da7b86644ba61241 (origin/master, origin/HEAD) > Author: Chris Wilson <chris@chris-wilson.co.uk> > Date: Sat May 25 08:04:53 2019 +0100 > > i915/gem_workarounds: Verify regs directly > > It seems like the HW validator is getting better at preventing our > snooping of system registers from non-privileged batches! If we can't > use SRM, let's probe the register directly through mmio, making sure we > have the context spinning on the GPU first. > > v2: Hold forcewake just in case the spinning batch isn't enough to > justify our register access. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110544 > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Matthew Auld <matthew.william.auld@gmail.com> > Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com> > Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Seems to have done the trick, thanks!
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