Bug 110978 - [CI][BAT] igt@i915_selftest@live_client - dmesg-fail - selftests: igt_client_fill failed with error -22
Summary: [CI][BAT] igt@i915_selftest@live_client - dmesg-fail - selftests: igt_client_...
Status: RESOLVED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: XOrg git
Hardware: Other All
: highest normal
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks:
 
Reported: 2019-06-24 10:54 UTC by Martin Peres
Modified: 2019-06-24 19:28 UTC (History)
1 user (show)

See Also:
i915 platform: GLK
i915 features: GEM/Other


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Description Martin Peres 2019-06-24 10:54:38 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6331/shard-glk5/igt@i915_selftest@live_client.html

<6> [1462.946799] i915: Running i915_gem_client_blt_live_selftests/igt_client_fill
<7> [1462.947552] [drm:intel_power_well_enable [i915]] enabling always-on
<7> [1462.947637] [drm:intel_power_well_enable [i915]] enabling DC off
<7> [1462.948231] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
<3> [1462.950025] vaddr[114688]=49b1f1bf, expected=971c4f10
<7> [1462.950340] [drm:intel_power_well_disable [i915]] disabling DC off
<7> [1462.950433] [drm:gen9_enable_dc5 [i915]] Enabling DC5
<7> [1462.950516] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
<7> [1462.952653] [drm:intel_power_well_disable [i915]] disabling always-on
<3> [1462.952691] i915/i915_gem_client_blt_live_selftests: igt_client_fill failed with error -22
Comment 1 CI Bug Log 2019-06-24 10:55:28 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* GLK: igt@i915_selftest@live_client - dmesg-fail - selftests: igt_client_fill failed with error -22
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6331/shard-glk5/igt@i915_selftest@live_client.html
Comment 2 Chris Wilson 2019-06-24 19:28:48 UTC
commit 871918dffefc594e765cc7e885a36a7fd3f38da7 (HEAD -> drm-intel-next-queued, drm-intel/for-linux-next, drm-intel/drm-intel-next-queued)
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Mon Jun 24 15:16:30 2019 +0100

    drm/i915/gem: Clear read/write domains for GPU clear
    
    Update the domains for the write via the GPU so that we do not
    shortcircuit any set-domain clflush afterwards.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110978
    Fixes: b2dbf8d982a4 ("drm/i915/blt: Remove recursive vma->lock")
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Cc: Matthew Auld <matthew.auld@intel.com>
    Reviewed-by: Matthew Auld <matthew.auld@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20190624141630.11015-1-chris@chris-wilson.co.uk


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