Bug 111329 - [CI][SHARDS] igt@gem_ctx_isolation@vcs1-nonpriv - fail - igt@gem_ctx_isolation@vcs1-nonpriv - fail - Failed assertion: num_errors == 0, registers mistached between nonpriv read/writes
Summary: [CI][SHARDS] igt@gem_ctx_isolation@vcs1-nonpriv - fail - igt@gem_ctx_isolatio...
Status: RESOLVED MOVED
Alias: None
Product: DRI
Classification: Unclassified
Component: IGT (show other bugs)
Version: DRI git
Hardware: Other All
: high normal
Assignee: Default DRI bug account
QA Contact:
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks:
 
Reported: 2019-08-08 08:28 UTC by Lakshmi
Modified: 2019-11-12 07:41 UTC (History)
1 user (show)

See Also:
i915 platform: ICL, TGL
i915 features: GEM/Other


Attachments

Description Lakshmi 2019-08-08 08:28:59 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html

tarting subtest: vcs1-nonpriv
(gem_ctx_isolation:1557) WARNING: Register 0x1c4600 (VCS1_GPR[0]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4604 (VCS1_GPR[1]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4608 (VCS1_GPR[2]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c460c (VCS1_GPR[3]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4610 (VCS1_GPR[4]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4614 (VCS1_GPR[5]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4618 (VCS1_GPR[6]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c461c (VCS1_GPR[7]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4620 (VCS1_GPR[8]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4624 (VCS1_GPR[9]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4628 (VCS1_GPR[10]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c462c (VCS1_GPR[11]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4630 (VCS1_GPR[12]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4634 (VCS1_GPR[13]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4638 (VCS1_GPR[14]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c463c (VCS1_GPR[15]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4640 (VCS1_GPR[16]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4644 (VCS1_GPR[17]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4648 (VCS1_GPR[18]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c464c (VCS1_GPR[19]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4650 (VCS1_GPR[20]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4654 (VCS1_GPR[21]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4658 (VCS1_GPR[22]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c465c (VCS1_GPR[23]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4660 (VCS1_GPR[24]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4664 (VCS1_GPR[25]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4668 (VCS1_GPR[26]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c466c (VCS1_GPR[27]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4670 (VCS1_GPR[28]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4674 (VCS1_GPR[29]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c4678 (VCS1_GPR[30]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) WARNING: Register 0x1c467c (VCS1_GPR[31]): A=ffffffff B=00000000
(gem_ctx_isolation:1557) CRITICAL: Test assertion failure function compare_regs, file ../tests/i915/gem_ctx_isolation.c:539:
(gem_ctx_isolation:1557) CRITICAL: Failed assertion: num_errors == 0
(gem_ctx_isolation:1557) CRITICAL: 32 registers mistached between nonpriv read/writes.
Subtest vcs1-nonpriv failed.
Comment 2 Chris Wilson 2019-08-08 11:56:39 UTC
There are two problems here, the first being the uncertain mapping of BSD2 which will be fixed. However, the other is a bit more insidous in that we transparently map BSD2 onto vcs2 and here we are checking vcs1 CS_GPR which will also technically be in a foreign powerwell and foreign context.
Comment 3 Chris Wilson 2019-08-08 15:14:51 UTC
Related fix in commit f1c4d157ab9b13c1228f3b8ad7747126785460d0 (HEAD -> drm-intel-next-queued, drm-intel/for-linux-next, drm-intel/drm-intel-next-queued)
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Thu Aug 8 12:06:12 2019 +0100

    drm/i915: Fix up the inverse mapping for default ctx->engines[]
    
    The order in which we store the engines inside default_engines() for the
    legacy ctx->engines[] has to match the legacy I915_EXEC_RING selector
    mapping in execbuf::user_map. If we present VCS2 as being the second
    instance of the video engine, legacy userspace calls that I915_EXEC_BSD2
    and so we need to insert it into the second video slot.
    
    v2: Record the legacy mapping (hopefully we can remove this need in the
    future)
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111328
    Fixes: 2edda80db3d0 ("drm/i915: Rename engines to match their user interface")
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
    Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> #v1
    Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20190808110612.23539-2-chris@chris-wilson.co.uk
Comment 4 Chris Wilson 2019-08-10 16:29:52 UTC
commit d5b2a3a4f85ad135123db8fc97ccdbf893546330
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Fri Aug 9 13:31:53 2019 +0100

    drm/i915: Check for a second VCS engine more carefully
Comment 5 Chris Wilson 2019-08-11 09:12:35 UTC
Yup, this needs to engine->mmio_base aware. Or learn about relative addressing for gen11.
Comment 6 CI Bug Log 2019-09-30 19:41:03 UTC
A CI Bug Log filter associated to this bug has been updated:

{- ICL: igt@gem_ctx_isolation@vcs1-nonpriv - fail - Failed assertion: num_errors == 0, registers mistached between nonpriv read/writes -}
{+ ICL TGL: igt@gem_ctx_isolation@vcs1-nonpriv -*- fail - Failed assertion: num_errors == 0, registers mistached between nonpriv read/writes +}

New failures caught by the filter:

  * https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5208/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
Comment 7 chinchan 2019-10-01 09:29:23 UTC
Nice to see this post here and thanks for sharing this to us. Keep sharing the new posts like this.
see here https://reynardsnyc.com & https://www.uwgw.org
Comment 8 Francesco Balestrieri 2019-11-11 09:53:57 UTC
Based on off-line discussion, it appears that this needs to be fixed in IGT.
Comment 9 Martin Peres 2019-11-12 07:41:30 UTC
-- GitLab Migration Automatic Message --

This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity.

You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28.


Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.