Bug 111518 - [CI][DRMTIP] igt@gem_.* - incomplete/timeout - Received signal SIGQUIT
Summary: [CI][DRMTIP] igt@gem_.* - incomplete/timeout - Received signal SIGQUIT
Status: RESOLVED DUPLICATE of bug 111747
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: DRI git
Hardware: Other All
: not set not set
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2019-08-29 12:17 UTC by Lakshmi
Modified: 2019-09-23 13:12 UTC (History)
1 user (show)

See Also:
i915 platform: SKL, SNB
i915 features: CI Infra


Attachments

Description Lakshmi 2019-08-29 12:17:37 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_353/fi-skl-guc/igt@gem_ctx_switch@legacy-default-heavy-queue.html
Starting subtest: legacy-default-heavy-queue
Received signal SIGQUIT.
Stack trace:
Comment 1 Lakshmi 2019-08-29 12:18:59 UTC
Below fix is already part of this run. So, thinking it's a new issue.

commit ebfdf5cd806b3bbf1ff79e69bce6a28df8bbe39d (HEAD -> drm-intel-next-queued, drm-intel/for-linux-next, drm-intel/drm-intel-next-queued)
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Mon Aug 26 14:07:50 2019 +0100

    drm/i915: Use NOEVICT for first pass on attemping to pin a GGTT mmap
    
    The intention is that we first try to pin the current vma into the
    mappable aperture only if it is already in use or it fits in the free
    space and will not cause contention. The first attempt was meant to be
    using PIN_NOEVICT to reuse the current vma if possible, following up
    with different eviction strategies.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111485
    Fixes: 6846895fde05 ("drm/i915: Replace PIN_NONFAULT with calls to PIN_NOEVICT")
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Cc: Matthew Auld <matthew.auld@intel.com>
    Reviewed-by: Matthew Auld <matthew.auld@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20190826130750.17272-1-chris@chris-wilson.co.uk
Comment 3 Chris Wilson 2019-08-29 13:16:39 UTC
That's not us (it was killed 400ms into a 20+s run), that's the test runner + infrastructure. Such early deaths have been happening for at least a year.
Comment 4 Lakshmi 2019-08-30 05:36:24 UTC
(In reply to Chris Wilson from comment #3)
> That's not us (it was killed 400ms into a 20+s run), that's the test runner
> + infrastructure. Such early deaths have been happening for at least a year.

Setting the component to CI Infra.
Comment 5 Chris Wilson 2019-09-13 21:16:22 UTC
The timestamps on igt_runner0.txt should help here.
Comment 6 CI Bug Log 2019-09-16 11:07:56 UTC
A CI Bug Log filter associated to this bug has been updated:

{- SNB SKL: igt@gem_.* - incomplete/timeout - Received signal SIGQUIT -}
{+ SNB SKL: igt@gem_.* - incomplete/timeout - Received signal SIGQUIT +}

New failures caught by the filter:

  * https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5181/shard-skl3/igt@gem_exec_parallel@vecs0-contexts.html
Comment 7 Chris Wilson 2019-09-20 16:52:54 UTC

*** This bug has been marked as a duplicate of bug 111747 ***
Comment 8 CI Bug Log 2019-09-23 13:12:08 UTC
A CI Bug Log filter associated to this bug has been updated:

{- SNB SKL: igt@gem_.* - incomplete/timeout - Received signal SIGQUIT -}
{+ SNB BYT SKL: igt@gem_.* - incomplete/timeout - Received signal SIGQUIT +}

New failures caught by the filter:

  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_375/fi-byt-n2820/igt@gem_eio@in-flight-contexts-1us.html


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