Bug 111706 - [CI]RESUME] igt@*vebox* - skip - Test requirement: gem_has_ring(fd, ring), SKIP
Summary: [CI]RESUME] igt@*vebox* - skip - Test requirement: gem_has_ring(fd, ring), SKIP
Status: RESOLVED NOTABUG
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: XOrg git
Hardware: Other All
: high not set
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2019-09-17 07:01 UTC by Martin Peres
Modified: 2019-09-17 08:50 UTC (History)
1 user (show)

See Also:
i915 platform: TGL
i915 features: GEM/Other


Attachments

Description Martin Peres 2019-09-17 07:01:35 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_mocs_settings@mocs-settings-vebox.html

Starting subtest: mocs-settings-vebox
Test requirement not met in function gem_require_ring, file ../lib/ioctl_wrappers.c:1266:
Test requirement: gem_has_ring(fd, ring)
Subtest mocs-settings-vebox: SKIP (0.000s)

This is due to https://cgit.freedesktop.org/drm-tip/commit/?id=6da301e5291717861fb25025b782922d3a36c7af.
Comment 1 CI Bug Log 2019-09-17 07:02:46 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* TGL: igt@*vebox* - skip - Test requirement: gem_has_ring(fd, ring), SKIP
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@prime_busy@after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@prime_busy@wait-hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@prime_busy@before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_ctx_shared@q-promotion-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_ctx_shared@q-smoketest-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_mocs_settings@mocs-reset-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@prime_busy@after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@prime_busy@before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_bad_reloc@negative-reloc-lut-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@prime_vgem@fence-wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox-heavy-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@prime_vgem@busy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@prime_busy@wait-after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_ctx_shared@q-out-order-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_bad_reloc@negative-reloc-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@prime_busy@wait-before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox-heavy.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_ctx_shared@q-in-order-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_mocs_settings@mocs-isolation-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@prime_busy@wait-hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@prime_vgem@sync-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_ctx_shared@q-independent-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@prime_busy@hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@prime_vgem@wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_mocs_settings@mocs-rc6-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_mocs_settings@mocs-settings-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_ctx_shared@q-promotion-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_ctx_shared@exec-shared-gtt-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_ctx_shared@q-smoketest-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_mocs_settings@mocs-reset-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@prime_busy@after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@prime_busy@before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_bad_reloc@negative-reloc-lut-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@prime_vgem@fence-wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox-heavy-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@prime_vgem@busy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@prime_busy@wait-after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_ctx_shared@q-out-order-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_bad_reloc@negative-reloc-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@prime_busy@wait-before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox-heavy.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_ctx_shared@q-in-order-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_mocs_settings@mocs-isolation-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@prime_busy@wait-hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@prime_vgem@sync-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_ctx_shared@q-independent-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@prime_busy@hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@prime_vgem@wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_mocs_settings@mocs-rc6-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_mocs_settings@mocs-settings-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_ctx_shared@q-independent-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_ctx_shared@q-promotion-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_ctx_shared@exec-shared-gtt-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox-heavy-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_ctx_shared@q-promotion-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_ctx_shared@exec-shared-gtt-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_ctx_shared@q-smoketest-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_mocs_settings@mocs-reset-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@prime_busy@after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@prime_busy@before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_bad_reloc@negative-reloc-lut-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@prime_vgem@fence-wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox-heavy-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@prime_vgem@busy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@prime_busy@wait-after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_ctx_shared@q-out-order-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@prime_busy@wait-before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox-heavy.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@prime_vgem@sync-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_ctx_shared@q-independent-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@prime_busy@hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@prime_vgem@wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_mocs_settings@mocs-rc6-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_mocs_settings@mocs-settings-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_ctx_shared@q-promotion-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_ctx_shared@exec-shared-gtt-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_ctx_shared@q-smoketest-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_mocs_settings@mocs-reset-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@prime_busy@after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@prime_busy@before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_bad_reloc@negative-reloc-lut-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@prime_vgem@fence-wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox-heavy-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@prime_vgem@busy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@prime_busy@wait-after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_ctx_shared@q-out-order-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_bad_reloc@negative-reloc-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@prime_busy@wait-before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox-heavy.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_ctx_shared@q-in-order-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_mocs_settings@mocs-isolation-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@prime_busy@wait-hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@prime_vgem@sync-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_ctx_shared@q-independent-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@prime_busy@hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@prime_vgem@wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_mocs_settings@mocs-rc6-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_mocs_settings@mocs-settings-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@prime_vgem@wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@prime_vgem@busy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@prime_busy@wait-before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_ctx_shared@q-smoketest-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_mocs_settings@mocs-isolation-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@prime_busy@hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_mocs_settings@mocs-rc6-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_ctx_shared@q-in-order-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_mocs_settings@mocs-reset-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_ctx_switch@legacy-vebox-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@prime_busy@wait-after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@prime_vgem@fence-wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_mocs_settings@mocs-settings-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@prime_vgem@wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_ctx_shared@q-out-order-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@prime_vgem@busy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@prime_busy@wait-before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@prime_busy@after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@prime_busy@wait-hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@prime_busy@before-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_ctx_shared@q-independent-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_ctx_shared@q-promotion-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_ctx_shared@exec-shared-gtt-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox-heavy-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_ctx_shared@q-smoketest-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_mocs_settings@mocs-isolation-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@prime_busy@hang-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_mocs_settings@mocs-rc6-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_ctx_shared@q-in-order-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_mocs_settings@mocs-reset-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_ctx_switch@legacy-vebox-queue.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@prime_busy@wait-after-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@prime_vgem@fence-wait-vebox.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_mocs_settings@mocs-settings-vebox.html
Comment 2 Chris Wilson 2019-09-17 07:31:24 UTC
Many engines were dying, so many engines were removed until they no longer die.
Comment 3 Martin Peres 2019-09-17 08:17:25 UTC
(In reply to Chris Wilson from comment #2)
> Many engines were dying, so many engines were removed until they no longer
> die.

NOTABUG is for things that are expected and need to fixing (a test requiring a feature that is gone for example). We plan on making use of those engines, I am re-opening the bug to keep track of the issue.
Comment 4 CI Bug Log 2019-09-17 08:23:52 UTC
A CI Bug Log filter associated to this bug has been updated:

{- TGL: igt@*vebox* - skip - Test requirement: gem_has_ring(fd, ring), SKIP -}
{+ TGL: igt@*vebox* - skip - Test requirement: gem_has_ring(fd, ring) / gem_ring_has_physical_engine(fd, e->exec_id | e->flags), SKIP +}

New failures caught by the filter:

  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@deep-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@preempt-other-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@independent-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@preempt-self-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@preemptive-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@in-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@smoketest-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@promotion-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@preempt-queue-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@preempt-other-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@fifo-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@preempt-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_capture@capture-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@reorder-wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@out-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@independent-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@preempt-contexts-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_async@concurrent-writes-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@deep-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@preempt-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u/igt@gem_exec_schedule@preempt-other-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@preempt-self-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@preemptive-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@in-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@smoketest-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@promotion-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@preempt-queue-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@preempt-other-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@fifo-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@preempt-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_capture@capture-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@reorder-wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@out-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@independent-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@preempt-queue-contexts-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@preempt-contexts-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_async@concurrent-writes-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@deep-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@preempt-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_369/fi-tgl-u2/igt@gem_exec_schedule@preempt-other-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@preempt-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@preemptive-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@preempt-self-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@preemptive-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@in-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@smoketest-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@promotion-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@preempt-queue-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@preempt-other-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@fifo-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@preempt-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_capture@capture-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@reorder-wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@independent-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@preempt-contexts-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_async@concurrent-writes-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@deep-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@preempt-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u/igt@gem_exec_schedule@preempt-other-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@preempt-self-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@preemptive-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@in-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@smoketest-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@promotion-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@preempt-queue-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@preempt-other-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@fifo-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@preempt-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_capture@capture-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@reorder-wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@out-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@independent-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@preempt-queue-contexts-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@preempt-contexts-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_async@concurrent-writes-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@deep-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@preempt-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_370/fi-tgl-u2/igt@gem_exec_schedule@preempt-other-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@preempt-queue-contexts-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_capture@capture-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@preempt-self-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@preempt-other-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@fifo-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@pi-ringfull-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@preempt-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@in-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@preempt-contexts-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@out-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_async@concurrent-writes-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@reorder-wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@preempt-queue-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@smoketest-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@promotion-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@preempt-queue-contexts-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_capture@capture-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@preempt-self-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@preempt-other-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@in-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@preempt-contexts-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@deep-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@preempt-other-chain-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@independent-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@preempt-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@preemptive-hang-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@out-order-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_async@concurrent-writes-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@reorder-wide-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@preempt-queue-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@smoketest-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@promotion-vebox.html
  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_371/fi-tgl-u2/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
Comment 5 Chris Wilson 2019-09-17 08:36:35 UTC
The tests are skipping exactly as intended as they have *nothing* to test.


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