https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/fi-tgl-u2/igt@i915_selftest@live_gt_timelines.html <6> [457.815182] [IGT] i915_selftest: executing <6> [457.820390] [IGT] i915_selftest: starting subtest live_gt_timelines <5> [457.871111] Setting dangerous option live_selftests - tainting kernel <6> [457.892217] [drm] i915.alpha_support is deprecated, use i915.force_probe=9a49 instead <7> [457.892397] i915 0000:00:02.0: [drm:i915_driver_probe [i915]] WOPCM: 2048K <7> [457.892453] i915 0000:00:02.0: [drm:intel_uc_init_early [i915]] enable_guc=0 (guc:no submission:no huc:no) <7> [457.892621] [drm:intel_pch_type [i915]] Found Tiger Lake LP PCH <7> [457.892668] [drm:intel_power_domains_init [i915]] Allowed DC state mask 0b <7> [457.893232] [drm:intel_device_info_init_mmio [i915]] vdbox enable: 0005, instances: 0005 <7> [457.893268] [drm:intel_device_info_init_mmio [i915]] vebox enable: 0001, instances: 0001 <7> [457.893696] [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M <7> [457.893736] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M <7> [457.893769] [drm:i915_ggtt_probe_hw [i915]] DSM size = 60M <6> [457.893779] i915 0000:00:02.0: vgaarb: deactivate vga console <7> [457.894021] [drm:i915_gem_init_stolen [i915]] GEN6_STOLEN_RESERVED = 0x000000004f2000c7 <7> [457.894055] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 61440K, usable: 59392K <7> [457.894291] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params <7> [457.894336] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x44962018 <7> [457.894390] [drm:intel_opregion_setup [i915]] ACPI OpRegion version 2.1.0 <7> [457.894422] [drm:intel_opregion_setup [i915]] Public ACPI methods supported <7> [457.894456] [drm:intel_opregion_setup [i915]] SWSCI supported <7> [457.914915] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300583 <7> [457.914957] [drm:intel_opregion_setup [i915]] ASLE supported <7> [457.914991] [drm:intel_opregion_setup [i915]] ASLE extension supported <7> [457.915020] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4) <7> [457.915056] [drm:i915_driver_probe [i915]] DRAM type: DDR4 <7> [457.915086] [drm:skl_dram_get_dimm_info [i915]] CH0 DIMM L size: 8 GB, width: X8, ranks: 1, 16Gb DIMMs: no <7> [457.915109] [drm:skl_dram_get_dimm_info [i915]] CH0 DIMM S size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no <7> [457.915132] [drm:skl_dram_get_channel_info [i915]] CH0 ranks: 1, 16Gb DIMMs: no <7> [457.915164] [drm:skl_dram_get_dimm_info [i915]] CH1 DIMM L size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no <7> [457.915185] [drm:skl_dram_get_dimm_info [i915]] CH1 DIMM S size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no <7> [457.915205] [drm:skl_dram_get_channel_info [i915]] CH1 not populated <7> [457.915225] [drm:i915_driver_probe [i915]] Memory configuration is symmetric? no <7> [457.915246] [drm:i915_driver_probe [i915]] DRAM bandwidth: 17066672 kBps, channels: 1 <7> [457.915265] [drm:i915_driver_probe [i915]] DRAM ranks: 1, 16Gb DIMMs: no <7> [457.915352] [drm:icl_get_bw_info [i915]] QGV 0: DCLK=128 tRP=15 tRDPRE=8 tRAS=35 tRCD=15 tRC=50 <7> [457.915386] [drm:icl_get_bw_info [i915]] BW0 / QGV 0: num_planes=2 deratedbw=14894 <7> [457.915416] [drm:icl_get_bw_info [i915]] BW1 / QGV 0: num_planes=1 deratedbw=20061 <7> [457.915445] [drm:intel_bios_init [i915]] Skipping VBT init due to disabled display. <7> [457.915731] [drm:intel_dsm_detect [i915]] no _DSM method for intel device <7> [457.915880] [drm:i915_driver_probe [i915]] rawclk rate: 19200 kHz <7> [457.915970] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 <7> [457.916066] [drm:intel_combo_phy_init [i915]] Combo PHY A already enabled, won't reprogram it. <7> [457.916155] [drm:intel_combo_phy_init [i915]] Combo PHY B already enabled, won't reprogram it. <7> [457.916268] [drm:intel_power_well_enable [i915]] enabling power well 1 <7> [457.916324] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 172800 kHz, VCO 345600 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0 <7> [457.916380] [drm:intel_power_well_enable [i915]] enabling always-on <7> [457.916408] [drm:intel_power_well_enable [i915]] enabling DC off <7> [457.916436] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 <7> [457.916503] [drm:intel_combo_phy_init [i915]] Combo PHY A already enabled, won't reprogram it. <7> [457.916550] [drm:intel_combo_phy_init [i915]] Combo PHY B already enabled, won't reprogram it. <7> [457.916577] [drm:intel_power_well_enable [i915]] enabling power well 2 <7> [457.916605] [drm:intel_power_well_enable [i915]] enabling power well 3 <7> [457.916668] [drm:intel_power_well_enable [i915]] enabling power well 4 <7> [457.916697] [drm:intel_power_well_enable [i915]] enabling power well 5 <7> [457.916825] [drm:intel_csr_ucode_init [i915]] Loading i915/tgl_dmc_ver2_04.bin <7> [457.918027] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1 <7> [457.918083] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec) <7> [457.918111] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 59 (59.0 usec) <7> [457.918136] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 68 (68.0 usec) <7> [457.918158] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 72 (72.0 usec) <7> [457.918179] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 103 (103.0 usec) <7> [457.918199] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 117 (117.0 usec) <7> [457.918219] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 123 (123.0 usec) <7> [457.918239] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 139 (139.0 usec) <7> [457.918293] [drm:intel_modeset_init [i915]] 4 display pipes available. <7> [457.918391] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 172800 kHz, VCO 345600 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0 <6> [457.918502] mei_hdcp mei::b638ab7e-94e2-4ea2-a552-d1c54b627f04:01: bound 0000:00:02.0 (ops i915_hdcp_component_ops [i915]) <6> [457.918503] [drm] Finished loading DMC firmware i915/tgl_dmc_ver2_04.bin (v2.4) <7> [457.918547] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 652800 kHz <7> [457.918589] [drm:intel_modeset_init [i915]] Max dotclock rate: 1305600 kHz <7> [457.919057] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 0 <7> [457.919120] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0 <7> [457.919159] [drm:intel_modeset_setup_hw_state [i915]] TBT PLL hw state readout: crtc_mask 0x00000000, on 0 <7> [457.919423] [drm:i915_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000] <7> [457.919721] [drm:__intel_engine_init_ctx_wa [i915]] Initialized 1 context workarounds on rcs'0 <7> [457.920126] [drm:i915_gem_contexts_init [i915]] logical context support initialized <7> [457.923884] [drm:intel_engines_driver_register [i915]] renamed rcs'0 to rcs0 <7> [457.923945] [drm:intel_engines_driver_register [i915]] renamed bcs'0 to bcs0 <7> [457.923983] [drm:intel_engines_driver_register [i915]] renamed vcs'0 to vcs0 <7> [457.924027] [drm:intel_engines_driver_register [i915]] renamed vcs'2 to vcs1 <7> [457.924050] [drm:intel_engines_driver_register [i915]] renamed vecs'0 to vecs0 <6> [457.925175] [drm] Initialized i915 1.6.0 20190822 for 0000:00:02.0 on minor 0 <7> [457.925789] [drm:intel_audio_init [i915]] init value of AUD_FREQ_CNTRL of 0x9010 <7> [457.925837] [drm:intel_power_well_disable [i915]] disabling power well 5 <7> [457.925997] [drm:intel_power_well_disable [i915]] disabling power well 4 <7> [457.926062] [drm:intel_power_well_disable [i915]] disabling power well 3 <7> [457.926110] [drm:intel_power_well_disable [i915]] disabling power well 2 <7> [457.926146] [drm:intel_power_well_disable [i915]] disabling DC off <7> [457.926181] [drm:skl_enable_dc6 [i915]] Enabling DC6 <7> [457.926211] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02 <7> [457.927301] [drm:intel_power_well_disable [i915]] disabling always-on <7> [457.928416] i915 device info: pciid=0x9a49 rev=0x00 platform=TIGERLAKE (subplatform=0x0) gen=12 <7> [457.928420] i915 device info: is_mobile: no <7> [457.928427] i915 device info: is_lp: no <7> [457.928430] i915 device info: require_force_probe: yes <7> [457.928434] i915 device info: has_64bit_reloc: yes <7> [457.928441] i915 device info: gpu_reset_clobbers_display: no <7> [457.928445] i915 device info: has_reset_engine: yes <7> [457.928448] i915 device info: has_fpga_dbg: yes <7> [457.928451] i915 device info: has_global_mocs: yes <7> [457.928455] i915 device info: has_gt_uc: yes <7> [457.928460] i915 device info: has_l3_dpf: no <7> [457.928465] i915 device info: has_llc: yes <7> [457.928472] i915 device info: has_logical_ring_contexts: yes <7> [457.928478] i915 device info: has_logical_ring_elsq: yes <7> [457.928481] i915 device info: has_logical_ring_preemption: yes <7> [457.928485] i915 device info: has_pooled_eu: no <7> [457.928489] i915 device info: has_rc6: yes <7> [457.928491] i915 device info: has_rc6p: no <7> [457.928495] i915 device info: has_rps: no <7> [457.928499] i915 device info: has_runtime_pm: yes <7> [457.928502] i915 device info: has_snoop: no <7> [457.928505] i915 device info: has_coherent_ggtt: no <7> [457.928509] i915 device info: unfenced_needs_alignment: no <7> [457.928515] i915 device info: hws_needs_physical: no <7> [457.928521] i915 device info: cursor_needs_physical: no <7> [457.928524] i915 device info: has_csr: yes <7> [457.928528] i915 device info: has_ddi: yes <7> [457.928532] i915 device info: has_dp_mst: yes <7> [457.928536] i915 device info: has_dsb: yes <7> [457.928539] i915 device info: has_fbc: yes <7> [457.928541] i915 device info: has_gmch: no <7> [457.928543] i915 device info: has_hotplug: yes <7> [457.928545] i915 device info: has_ipc: yes <7> [457.928547] i915 device info: has_modular_fia: yes <7> [457.928549] i915 device info: has_overlay: no <7> [457.928550] i915 device info: has_psr: yes <7> [457.928552] i915 device info: overlay_needs_physical: no <7> [457.928554] i915 device info: supports_tv: no <7> [457.928556] i915 device info: slice total: 1, mask=0001 <7> [457.928558] i915 device info: subslice total: 6 <7> [457.928561] i915 device info: slice0: 6 subslices, mask=0000003f <7> [457.928563] i915 device info: EU total: 96 <7> [457.928565] i915 device info: EU per subslice: 16 <7> [457.928567] i915 device info: has slice power gating: yes <7> [457.928569] i915 device info: has subslice power gating: no <7> [457.928571] i915 device info: has EU power gating: no <7> [457.928573] i915 device info: CS timestamp frequency: 19200 kHz <6> [457.928574] [drm] DRM_I915_DEBUG enabled <6> [457.928576] [drm] DRM_I915_DEBUG_GEM enabled <6> [457.928578] [drm] DRM_I915_DEBUG_RUNTIME_PM enabled <6> [457.928584] i915: Performing live selftests with st_random_seed=0x2b18b22d st_timeout=1000 <6> [457.928592] i915: Running gt_timelines <6> [457.928616] i915: Running intel_timeline_live_selftests/live_hwsp_recycle <7> [457.928803] [drm:intel_power_well_enable [i915]] enabling always-on
The CI Bug Log issue associated to this bug has been updated. ### New filters associated * TGL´: igt@i915_selftest@live_gt_timelines - incomplete - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3497/fi-tgl-u2/igt@i915_selftest@live_gt_timelines.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6954/fi-tgl-u2/igt@i915_selftest@live_gt_timelines.html - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3498/fi-tgl-u2/igt@i915_selftest@live_gt_timelines.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14527/fi-tgl-u2/igt@i915_selftest@live_gt_timelines.html - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/fi-tgl-u2/igt@i915_selftest@live_gt_timelines.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14535/fi-tgl-u2/igt@i915_selftest@live_gt_timelines.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14541/fi-tgl-u2/igt@i915_selftest@live_gt_timelines.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14544/fi-tgl-u2/igt@i915_selftest@live_gt_timelines.html
Not happening too often, and here's to hoping that fixing other issues will improve stability. Chris, do you think this and other incompletes are caused by the issues are seeing with multiple engines?
A CI Bug Log filter associated to this bug has been updated: {- TGL´: igt@i915_selftest@live_gt_timelines - incomplete -} {+ TGL´: igt@i915_selftest@live_gt_timelines|igt@i915_selftest@live_gem_contexts - incomplete +} New failures caught by the filter: * https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/fi-tgl-u/igt@i915_selftest@live_gem_contexts.html
-- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/drm/intel/issues/455.
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