Bug 111833 - [CI][BAT] igt@i915_selftest@live_gtt - incomplete
Summary: [CI][BAT] igt@i915_selftest@live_gtt - incomplete
Status: RESOLVED MOVED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: DRI git
Hardware: Other All
: low normal
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on: 111880
Blocks:
  Show dependency treegraph
 
Reported: 2019-09-26 12:51 UTC by Lakshmi
Modified: 2019-11-29 19:35 UTC (History)
1 user (show)

See Also:
i915 platform: TGL
i915 features: GEM/Other


Attachments

Description Lakshmi 2019-09-26 12:51:20 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/fi-tgl-u2/igt@i915_selftest@live_gtt.html

<6> [480.504327] [IGT] i915_selftest: executing
<6> [480.510162] [IGT] i915_selftest: starting subtest live_gtt
<5> [480.559026] Setting dangerous option live_selftests - tainting kernel
<6> [480.580210] [drm] i915.alpha_support is deprecated, use i915.force_probe=9a49 instead
<7> [480.580389] i915 0000:00:02.0: [drm:i915_driver_probe [i915]] WOPCM: 2048K
<7> [480.580448] i915 0000:00:02.0: [drm:intel_uc_init_early [i915]] enable_guc=0 (guc:no submission:no huc:no)
<7> [480.580730] [drm:intel_pch_type [i915]] Found Tiger Lake LP PCH
<7> [480.580795] [drm:intel_power_domains_init [i915]] Allowed DC state mask 0b
<7> [480.581480] [drm:intel_device_info_init_mmio [i915]] vdbox enable: 0005, instances: 0005
<7> [480.581551] [drm:intel_device_info_init_mmio [i915]] vebox enable: 0001, instances: 0001
<7> [480.581842] [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M
<7> [480.581879] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
<7> [480.581912] [drm:i915_ggtt_probe_hw [i915]] DSM size = 60M
<6> [480.581922] i915 0000:00:02.0: vgaarb: deactivate vga console
<7> [480.582106] [drm:i915_gem_init_stolen [i915]] GEN6_STOLEN_RESERVED = 0x000000004f2000c7
<7> [480.582136] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 61440K, usable: 59392K
<7> [480.582379] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
<7> [480.582421] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x44962018
<7> [480.582474] [drm:intel_opregion_setup [i915]] ACPI OpRegion version 2.1.0
<7> [480.582561] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
<7> [480.582595] [drm:intel_opregion_setup [i915]] SWSCI supported
<7> [480.603639] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300583
<7> [480.603692] [drm:intel_opregion_setup [i915]] ASLE supported
<7> [480.603733] [drm:intel_opregion_setup [i915]] ASLE extension supported
<7> [480.603768] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
<7> [480.603802] [drm:i915_driver_probe [i915]] DRAM type: DDR4
<7> [480.603831] [drm:skl_dram_get_dimm_info [i915]] CH0 DIMM L size: 8 GB, width: X8, ranks: 1, 16Gb DIMMs: no
<7> [480.603853] [drm:skl_dram_get_dimm_info [i915]] CH0 DIMM S size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no
<7> [480.603874] [drm:skl_dram_get_channel_info [i915]] CH0 ranks: 1, 16Gb DIMMs: no
<7> [480.603896] [drm:skl_dram_get_dimm_info [i915]] CH1 DIMM L size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no
<7> [480.603916] [drm:skl_dram_get_dimm_info [i915]] CH1 DIMM S size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no
<7> [480.603937] [drm:skl_dram_get_channel_info [i915]] CH1 not populated
<7> [480.603955] [drm:i915_driver_probe [i915]] Memory configuration is symmetric? no
<7> [480.603977] [drm:i915_driver_probe [i915]] DRAM bandwidth: 17066672 kBps, channels: 1
<7> [480.603995] [drm:i915_driver_probe [i915]] DRAM ranks: 1, 16Gb DIMMs: no
<7> [480.604081] [drm:icl_get_bw_info [i915]] QGV 0: DCLK=128 tRP=15 tRDPRE=8 tRAS=35 tRCD=15 tRC=50
<7> [480.604117] [drm:icl_get_bw_info [i915]] BW0 / QGV 0: num_planes=2 deratedbw=14894
<7> [480.604162] [drm:icl_get_bw_info [i915]] BW1 / QGV 0: num_planes=1 deratedbw=20061
<7> [480.604208] [drm:intel_bios_init [i915]] Skipping VBT init due to disabled display.
<7> [480.604702] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
<7> [480.604834] [drm:i915_driver_probe [i915]] rawclk rate: 19200 kHz
<7> [480.604894] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
<7> [480.604968] [drm:intel_combo_phy_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [480.605020] [drm:intel_combo_phy_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [480.605119] [drm:intel_power_well_enable [i915]] enabling power well 1
<7> [480.605175] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 172800 kHz, VCO 345600 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0
<7> [480.605232] [drm:intel_power_well_enable [i915]] enabling always-on
<7> [480.605260] [drm:intel_power_well_enable [i915]] enabling DC off
<7> [480.605292] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
<7> [480.605362] [drm:intel_combo_phy_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [480.605408] [drm:intel_combo_phy_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [480.605436] [drm:intel_power_well_enable [i915]] enabling power well 2
<7> [480.605469] [drm:intel_power_well_enable [i915]] enabling power well 3
<7> [480.605628] [drm:intel_power_well_enable [i915]] enabling power well 4
<7> [480.605675] [drm:intel_power_well_enable [i915]] enabling power well 5
<7> [480.605823] [drm:intel_csr_ucode_init [i915]] Loading i915/tgl_dmc_ver2_04.bin
<6> [480.606740] [drm] Finished loading DMC firmware i915/tgl_dmc_ver2_04.bin (v2.4)
<7> [480.607747] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
<7> [480.607795] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
<7> [480.607823] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 59 (59.0 usec)
<7> [480.607847] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 68 (68.0 usec)
<7> [480.607870] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 72 (72.0 usec)
<7> [480.607892] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 103 (103.0 usec)
<7> [480.607915] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 117 (117.0 usec)
<7> [480.607937] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 123 (123.0 usec)
<7> [480.607958] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 139 (139.0 usec)
<7> [480.608003] [drm:intel_modeset_init [i915]] 4 display pipes available.
<7> [480.608052] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 172800 kHz, VCO 345600 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0
<6> [480.608159] mei_hdcp mei::b638ab7e-94e2-4ea2-a552-d1c54b627f04:01: bound 0000:00:02.0 (ops i915_hdcp_component_ops [i915])
<7> [480.608203] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 652800 kHz
<7> [480.608249] [drm:intel_modeset_init [i915]] Max dotclock rate: 1305600 kHz
<7> [480.608718] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 0
<7> [480.608776] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
<7> [480.608812] [drm:intel_modeset_setup_hw_state [i915]] TBT PLL hw state readout: crtc_mask 0x00000000, on 0
<7> [480.608848] [drm:intel_modeset_setup_hw_state [i915]] TC PLL 1 hw state readout: crtc_mask 0x00000000, on 0
<7> [480.608883] [drm:intel_modeset_setup_hw_state [i915]] TC PLL 2 hw state readout: crtc_mask 0x00000000, on 0
<7> [480.608917] [drm:intel_modeset_setup_hw_state [i915]] TC PLL 3 hw state readout: crtc_mask 0x00000000, on 0
<7> [480.608947] [drm:intel_modeset_setup_hw_state [i915]] TC PLL 4 hw state readout: crtc_mask 0x00000000, on 0
<7> [480.608976] [drm:intel_modeset_setup_hw_state [i915]] TC PLL 5 hw state readout: crtc_mask 0x00000000, on 0
<7> [480.609004] [drm:intel_modeset_setup_hw_state [i915]] TC PLL 6 hw state readout: crtc_mask 0x00000000, on 0
<7> [480.609257] [drm:i915_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000]
<7> [480.609690] [drm:__intel_engine_init_ctx_wa [i915]] Initialized 1 context workarounds on rcs'0
<7> [480.609969] [drm:i915_gem_contexts_init [i915]] logical context support initialized
<7> [480.615829] [drm:intel_engines_driver_register [i915]] renamed rcs'0 to rcs0
<7> [480.615876] [drm:intel_engines_driver_register [i915]] renamed bcs'0 to bcs0
<7> [480.615915] [drm:intel_engines_driver_register [i915]] renamed vcs'0 to vcs0
<7> [480.615951] [drm:intel_engines_driver_register [i915]] renamed vcs'2 to vcs1
<7> [480.615985] [drm:intel_engines_driver_register [i915]] renamed vecs'0 to vecs0
<6> [480.617556] [drm] Initialized i915 1.6.0 20190822 for 0000:00:02.0 on minor 0
<7> [480.618603] [drm:intel_audio_init [i915]] init value of AUD_FREQ_CNTRL of 0x9010
<7> [480.618661] [drm:intel_power_well_disable [i915]] disabling power well 5
<7> [480.618777] [drm:intel_power_well_disable [i915]] disabling power well 4
<7> [480.618846] [drm:intel_power_well_disable [i915]] disabling power well 3
<7> [480.618893] [drm:intel_power_well_disable [i915]] disabling power well 2
<7> [480.618941] [drm:intel_power_well_disable [i915]] disabling DC off
<7> [480.618990] [drm:skl_enable_dc6 [i915]] Enabling DC6
<7> [480.619033] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
<7> [480.620098] [drm:intel_power_well_disable [i915]] disabling always-on
<7> [480.621219] i915 device info: pciid=0x9a49 rev=0x00 platform=TIGERLAKE (subplatform=0x0) gen=12
<7> [480.621223] i915 device info: is_mobile: no
<7> [480.621226] i915 device info: is_lp: no
<7> [480.621229] i915 device info: require_force_probe: yes
<7> [480.621233] i915 device info: has_64bit_reloc: yes
<7> [480.621236] i915 device info: gpu_reset_clobbers_display: no
<7> [480.621240] i915 device info: has_reset_engine: yes
<7> [480.621243] i915 device info: has_fpga_dbg: yes
<7> [480.621247] i915 device info: has_global_mocs: yes
<7> [480.621250] i915 device info: has_gt_uc: yes
<7> [480.621253] i915 device info: has_l3_dpf: no
<7> [480.621257] i915 device info: has_llc: yes
<7> [480.621260] i915 device info: has_logical_ring_contexts: yes
<7> [480.621263] i915 device info: has_logical_ring_elsq: yes
<7> [480.621266] i915 device info: has_logical_ring_preemption: yes
<7> [480.621269] i915 device info: has_pooled_eu: no
<7> [480.621272] i915 device info: has_rc6: yes
<7> [480.621276] i915 device info: has_rc6p: no
<7> [480.621279] i915 device info: has_rps: no
<7> [480.621282] i915 device info: has_runtime_pm: yes
<7> [480.621285] i915 device info: has_snoop: no
<7> [480.621288] i915 device info: has_coherent_ggtt: no
<7> [480.621291] i915 device info: unfenced_needs_alignment: no
<7> [480.621294] i915 device info: hws_needs_physical: no
<7> [480.621298] i915 device info: cursor_needs_physical: no
<7> [480.621301] i915 device info: has_csr: yes
<7> [480.621310] i915 device info: has_ddi: yes
<7> [480.621313] i915 device info: has_dp_mst: yes
<7> [480.621317] i915 device info: has_dsb: yes
<7> [480.621322] i915 device info: has_fbc: yes
<7> [480.621325] i915 device info: has_gmch: no
<7> [480.621329] i915 device info: has_hotplug: yes
<7> [480.621332] i915 device info: has_ipc: yes
<7> [480.621335] i915 device info: has_modular_fia: yes
<7> [480.621339] i915 device info: has_overlay: no
<7> [480.621342] i915 device info: has_psr: yes
<7> [480.621345] i915 device info: overlay_needs_physical: no
<7> [480.621349] i915 device info: supports_tv: no
<7> [480.621352] i915 device info: slice total: 1, mask=0001
<7> [480.621356] i915 device info: subslice total: 6
<7> [480.621360] i915 device info: slice0: 6 subslices, mask=0000003f
<7> [480.621364] i915 device info: EU total: 96
<7> [480.621367] i915 device info: EU per subslice: 16
<7> [480.621370] i915 device info: has slice power gating: yes
<7> [480.621374] i915 device info: has subslice power gating: no
<7> [480.621377] i915 device info: has EU power gating: no
<7> [480.621381] i915 device info: CS timestamp frequency: 19200 kHz
<6> [480.621384] [drm] DRM_I915_DEBUG enabled
<6> [480.621387] [drm] DRM_I915_DEBUG_GEM enabled
<6> [480.621390] [drm] DRM_I915_DEBUG_RUNTIME_PM enabled
<6> [480.621395] i915: Performing live selftests with st_random_seed=0x5e4baea1 st_timeout=1000
<6> [480.621398] i915: Running gtt
<6> [480.621418] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_alloc
<6> [480.652153] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_lowlevel
<7> [481.652486] lowlevel_hole timed out before 114818/524288
<6> [482.520648] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_drunk
<7> [483.521507] drunk_hole timed out after 41221/524288
<6> [483.521817] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_walk
<7> [484.522493] walk_hole timed out at a237000
<6> [484.522566] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_pot
<7> [485.784127] pot_hole timed out after 34/47
<6> [485.784192] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_fill
<7> [487.627270] fill_hole timed out (npages=8388608, prime=2)
<6> [487.627642] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_shrink
<7> [488.780869] __shrink_hole timed out at ofset 1ffffff000 [0 - 1000000000000]
<6> [488.890590] i915: Running i915_gem_gtt_live_selftests/igt_ppgtt_shrink_boom
<6> [488.917758] i915: Running i915_gem_gtt_live_selftests/igt_ggtt_lowlevel
<7> [489.918486] lowlevel_hole timed out before 124612/524265
<6> [490.844508] i915: Running i915_gem_gtt_live_selftests/igt_ggtt_drunk
<7> [491.845489] drunk_hole timed out after 50651/524265
<6> [491.845655] i915: Running i915_gem_gtt_live_selftests/igt_ggtt_walk
<7> [492.846492] walk_hole timed out at c40a000
<6> [492.846502] i915: Running i915_gem_gtt_live_selftests/igt_ggtt_pot
<7> [494.860836] pot_hole timed out after 15/31
<6> [494.860850] i915: Running i915_gem_gtt_live_selftests/igt_ggtt_fill
<7> [495.863342] fill_hole timed out (npages=262144, prime=2)
<6> [495.863367] i915: Running i915_gem_gtt_live_selftests/igt_ggtt_page
<6> [495.864936] i915: Running i915_gem_gtt_live_selftests/igt_cs_tlb
<7> [495.865969] [drm:intel_power_well_enable [i915]] enabling always-on
Comment 1 CI Bug Log 2019-09-26 12:53:46 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* TGL: igt@i915_selftest@live_gtt - incomplete
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/fi-tgl-u2/igt@i915_selftest@live_gtt.html
Comment 2 Francesco Balestrieri 2019-10-02 05:19:49 UTC
Only a couple of occurrences so far, setting priority to low for now, might be prioritized higher once other issues are resolved.
Comment 3 Martin Peres 2019-11-29 19:35:21 UTC
-- GitLab Migration Automatic Message --

This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity.

You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/drm/intel/issues/457.


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