https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6957/fi-tgl-u2/igt@i915_selftest@live_guc.html

Above link is not working, but can be retrieved from internal staging pages.

6> [743.029708] [IGT] i915_selftest: executing
<6> [743.035106] [IGT] i915_selftest: starting subtest live_guc
<5> [743.084907] Setting dangerous option live_selftests - tainting kernel
<6> [743.109784] [drm] i915.alpha_support is deprecated, use i915.force_probe=9a49 instead
<7> [743.110123] i915 0000:00:02.0: [drm:i915_driver_probe [i915]] WOPCM: 2048K
<7> [743.110206] i915 0000:00:02.0: [drm:intel_uc_init_early [i915]] enable_guc=0 (guc:no submission:no huc:no)
<7> [743.110387] [drm:intel_pch_type [i915]] Found Tiger Lake LP PCH
<7> [743.110438] [drm:intel_power_domains_init [i915]] Allowed DC state mask 0b
<7> [743.110990] [drm:intel_device_info_init_mmio [i915]] vdbox enable: 0005, instances: 0005
<7> [743.111081] [drm:intel_device_info_init_mmio [i915]] vebox enable: 0001, instances: 0001
<7> [743.111381] [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M
<7> [743.111418] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
<7> [743.111452] [drm:i915_ggtt_probe_hw [i915]] DSM size = 60M
<6> [743.111469] i915 0000:00:02.0: vgaarb: deactivate vga console
<7> [743.111724] [drm:i915_gem_init_stolen [i915]] GEN6_STOLEN_RESERVED = 0x000000004f2000c7
<7> [743.111770] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 61440K, usable: 59392K
<7> [743.112092] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
<7> [743.112150] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x44962018
<7> [743.112237] [drm:intel_opregion_setup [i915]] ACPI OpRegion version 2.1.0
<7> [743.112282] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
<7> [743.112328] [drm:intel_opregion_setup [i915]] SWSCI supported
<7> [743.133865] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300583
<7> [743.133910] [drm:intel_opregion_setup [i915]] ASLE supported
<7> [743.133945] [drm:intel_opregion_setup [i915]] ASLE extension supported
<7> [743.133976] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
<7> [743.134007] [drm:i915_driver_probe [i915]] DRAM type: DDR4
<7> [743.134036] [drm:skl_dram_get_dimm_info [i915]] CH0 DIMM L size: 8 GB, width: X8, ranks: 1, 16Gb DIMMs: no
<7> [743.134059] [drm:skl_dram_get_dimm_info [i915]] CH0 DIMM S size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no
<7> [743.134081] [drm:skl_dram_get_channel_info [i915]] CH0 ranks: 1, 16Gb DIMMs: no
<7> [743.134102] [drm:skl_dram_get_dimm_info [i915]] CH1 DIMM L size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no
<7> [743.134123] [drm:skl_dram_get_dimm_info [i915]] CH1 DIMM S size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no
<7> [743.134142] [drm:skl_dram_get_channel_info [i915]] CH1 not populated
<7> [743.134163] [drm:i915_driver_probe [i915]] Memory configuration is symmetric? no
<7> [743.134184] [drm:i915_driver_probe [i915]] DRAM bandwidth: 17066672 kBps, channels: 1
<7> [743.134202] [drm:i915_driver_probe [i915]] DRAM ranks: 1, 16Gb DIMMs: no
<7> [743.134285] [drm:icl_get_bw_info [i915]] QGV 0: DCLK=128 tRP=15 tRDPRE=8 tRAS=35 tRCD=15 tRC=50
<7> [743.134319] [drm:icl_get_bw_info [i915]] BW0 / QGV 0: num_planes=2 deratedbw=14894
<7> [743.134350] [drm:icl_get_bw_info [i915]] BW1 / QGV 0: num_planes=1 deratedbw=20061
<7> [743.134381] [drm:intel_bios_init [i915]] Skipping VBT init due to disabled display.
<7> [743.134660] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
<7> [743.134758] [drm:i915_driver_probe [i915]] rawclk rate: 19200 kHz
<7> [743.134796] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
<7> [743.134892] [drm:intel_combo_phy_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [743.134946] [drm:intel_combo_phy_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [743.135008] [drm:intel_power_well_enable [i915]] enabling power well 1
<7> [743.135062] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 172800 kHz, VCO 345600 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0
<7> [743.135120] [drm:intel_power_well_enable [i915]] enabling always-on
<7> [743.135149] [drm:intel_power_well_enable [i915]] enabling DC off
<7> [743.135179] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
<7> [743.135247] [drm:intel_combo_phy_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [743.135296] [drm:intel_combo_phy_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [743.135324] [drm:intel_power_well_enable [i915]] enabling power well 2
<7> [743.135357] [drm:intel_power_well_enable [i915]] enabling power well 3
<7> [743.135415] [drm:intel_power_well_enable [i915]] enabling power well 4
<7> [743.135445] [drm:intel_power_well_enable [i915]] enabling power well 5
<7> [743.135556] [drm:intel_csr_ucode_init [i915]] Loading i915/tgl_dmc_ver2_04.bin
<7> [743.136601] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
<7> [743.136652] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
<7> [743.136682] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 59 (59.0 usec)
<7> [743.136708] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 68 (68.0 usec)