Bug 111925 - [CI][SHARDS]igt@gem_eio@in-flight-contexts-immediate|igt@gem_eio@in-flight-contexts-10ms - fail - Failed assertion: igt_seconds_elapsed(&ts) <= 10
Summary: [CI][SHARDS]igt@gem_eio@in-flight-contexts-immediate|igt@gem_eio@in-flight-co...
Status: RESOLVED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: DRI git
Hardware: Other All
: not set not set
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2019-10-08 16:34 UTC by Lakshmi
Modified: 2019-10-09 08:14 UTC (History)
1 user (show)

See Also:
i915 platform: BYT, HSW, SNB
i915 features: GEM/Other


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Description Lakshmi 2019-10-08 16:34:45 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-hsw4/igt@gem_eio@in-flight-contexts-10ms.html
Starting subtest: in-flight-contexts-10ms
(gem_eio:1508) CRITICAL: Test assertion failure function trigger_reset, file ../tests/i915/gem_eio.c:85:
(gem_eio:1508) CRITICAL: Failed assertion: igt_seconds_elapsed(&ts) <= 10
(gem_eio:1508) CRITICAL: error: 26 > 10
Subtest in-flight-contexts-10ms failed.

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7011/shard-snb7/igt@gem_eio@in-flight-contexts-immediate.html
Starting subtest: in-flight-contexts-immediate
(gem_eio:3011) CRITICAL: Test assertion failure function trigger_reset, file ../tests/i915/gem_eio.c:85:
(gem_eio:3011) CRITICAL: Failed assertion: igt_seconds_elapsed(&ts) <= 10
(gem_eio:3011) CRITICAL: error: 39 > 10
Subtest in-flight-contexts-immediate failed.
Comment 1 CI Bug Log 2019-10-08 16:35:27 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* SNB BYT HSW: igt@gem_eio@in-flight-contexts-immediate|igt@gem_eio@in-flight-contexts-10ms - fail - Failed assertion: igt_seconds_elapsed(&amp;ts) &lt;= 10
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7011/shard-snb7/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14671/shard-snb1/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14677/shard-snb4/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-hsw4/igt@gem_eio@in-flight-contexts-10ms.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-snb2/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-snb2/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_384/fi-byt-j1900/igt@gem_eio@in-flight-contexts-10ms.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_384/fi-snb-2600/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14681/shard-snb6/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb6/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3544/shard-snb4/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-snb7/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb6/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7026/shard-hsw6/igt@gem_eio@in-flight-contexts-10ms.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3550/shard-snb1/igt@gem_eio@in-flight-contexts-immediate.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3552/shard-snb7/igt@gem_eio@in-flight-contexts-immediate.html
Comment 2 Chris Wilson 2019-10-09 08:14:19 UTC
Hopefully,

commit 998e29e137444db6e0ec2c65611a7eab3e0b6a21
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Mon Oct 7 09:26:28 2019 +0100

    lib/i915: Bump conservative threshold for ring size
    
    We are still hitting the occasional stall upon submission, so be extra
    caution and leave one more spare.
    
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>


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