Bug 112031 - [CI][RESUME] igt@kms_flip@* - incomplete - system hang
Summary: [CI][RESUME] igt@kms_flip@* - incomplete - system hang
Status: NEW
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: DRI git
Hardware: Other All
: not set not set
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2019-10-16 12:06 UTC by Lakshmi
Modified: 2019-10-25 12:50 UTC (History)
1 user (show)

See Also:
i915 platform: TGL
i915 features: display/Other


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Comment 1 CI Bug Log 2019-10-16 12:06:50 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* TGL: igt@kms_flip@* - incomplete - system hang
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@2x-flip-vs-dpms.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@2x-flip-vs-fences-interruptible.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@2x-flip-vs-panning-interruptible.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@2x-modeset-vs-vblank-race.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@2x-nonexisting-fb.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@dpms-off-confusion-interruptible.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@plain-flip-ts-check.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip@plain-flip-ts-check-interruptible.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5226/shard-tglb1/igt@kms_flip@flip-vs-fences-interruptible.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7094/shard-tglb6/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
Comment 2 CI Bug Log 2019-10-16 12:32:30 UTC
A CI Bug Log filter associated to this bug has been updated:

{- TGL: igt@kms_flip@* - incomplete - system hang -}
{+ TGL: igt@kms_flip_* - incomplete - system hang +}

New failures caught by the filter:

  * https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_flip_tiling@flip-to-y-tiled.html
Comment 3 Jani Saarinen 2019-10-16 20:09:19 UTC
These kinds of bugs are really bad to start investigating as you are lakshmi saying that any kms tests that is incomplete goes to this category?
Comment 4 CI Bug Log 2019-10-17 06:11:43 UTC
A CI Bug Log filter associated to this bug has been updated:

{- TGL: igt@kms_flip_* - incomplete - system hang -}
{+ TGL: igt@kms_flip_* - incomplete - system hang +}


  No new failures caught with the new filter
Comment 5 Lakshmi 2019-10-17 06:14:37 UTC
(In reply to Jani Saarinen from comment #3)
> These kinds of bugs are really bad to start investigating as you are lakshmi
> saying that any kms tests that is incomplete goes to this category?

Not all KMS tets, only igt@kms_flip* related tests.
Comment 6 Stanislav Lisovskiy 2019-10-17 08:27:38 UTC
No obvious serious failures I could currently spot in the logs.

Moreover it is not quite clear what is the logic behind that watchdog triggered abort?

For example here - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7094/shard-tglb6/igt@kms_flip@flip-vs-wf_vblank-interruptible.html

I see in igt_runner log saying that it requests abort:

[33.585230] [03/97] (960s left) kms_flip (flip-vs-wf_vblank-interruptible)
Starting subtest: flip-vs-wf_vblank-interruptible
[37.934003] Abort requested by /sbin/init 3 [1] via Hangup, terminating children
[37.935188] Abort requested by /sbin/init 3 [1] via Terminated, terminating children
[39.984736] Closing watchdogs

Then same in dmesg, I see normal functioning and then suddenly "this is power.sh remotely rebooting this machine":

<6> [33.621434] [IGT] kms_flip: executing
<7> [33.624353] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:276:eDP-1]
<7> [33.624409] [drm:intel_dp_detect [i915]] [CONNECTOR:276:eDP-1]
<7> [33.624442] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
<7> [33.624472] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 216000, 243000, 270000
<7> [33.624501] [drm:intel_dp_print_rates [i915]] common rates: 162000, 216000, 270000
<7> [33.625149] [drm:intel_dp_get_dsc_sink_cap [i915]] DSC DPCD: 01 11 01 00 01 00 01 80 00 01 06 00 08 00 00
<7> [33.625192] [drm:intel_dp_detect [i915]] FEC CAPABILITY: 0
<7> [33.625806] [drm:intel_dp_detect [i915]] [ENCODER:275:DDI A] MST support? port: no, sink: no, modparam: yes
<7> [33.626309] [drm:drm_add_display_info] non_desktop set to 0
<7> [33.626341] [drm:drm_add_edid_modes] ELD: no CEA Extension found
<7> [33.626343] [drm:drm_add_display_info] non_desktop set to 0
<7> [33.626384] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:276:eDP-1] probed modes :
<7> [33.626389] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [33.626391] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 40 214000 1920 1936 1952 2104 1080 1083 1097 2532 0x40 0xa
<7> [33.626407] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:282:DP-1]
<7> [33.626442] [drm:intel_dp_detect [i915]] [CONNECTOR:282:DP-1]
<7> [33.626480] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:282:DP-1] disconnected
<7> [33.626491] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:291:HDMI-A-1]
<7> [33.626521] [drm:intel_hdmi_detect [i915]] [CONNECTOR:291:HDMI-A-1]
<7> [33.626559] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:291:HDMI-A-1] disconnected
<7> [33.626569] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:297:DP-2]
<7> [33.626599] [drm:intel_dp_detect [i915]] [CONNECTOR:297:DP-2]
<7> [33.626676] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:297:DP-2] disconnected
<7> [33.626686] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:304:DP-3]
<7> [33.626715] [drm:intel_dp_detect [i915]] [CONNECTOR:304:DP-3]
<7> [33.626790] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:304:DP-3] disconnected
<7> [33.626799] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:307:DP-4]
<7> [33.626827] [drm:intel_dp_detect [i915]] [CONNECTOR:307:DP-4]
<7> [33.626903] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:307:DP-4] disconnected
<6> [33.629898] [IGT] kms_flip: starting subtest flip-vs-wf_vblank-interruptible
<7> [33.630676] [drm:drm_mode_addfb2] [FB:313]
<7> [33.630710] [drm:drm_mode_addfb2] [FB:316]
<7> [33.705286] [drm:drm_mode_setcrtc] [CRTC:91:pipe A]
<7> [33.705440] [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 172800 kHz, actual 172800 kHz
<7> [33.705478] [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 0, actual 0
<7> [33.705546] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb (   0 -  972) -> (   0 -    0), size  972 ->    0
<7> [33.705568] [drm:skl_compute_wm [i915]] [PLANE:87:cursor A] ddb ( 972 - 1024) -> (   0 -    0), size   52 ->    0
<7> [33.705590] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm ->  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
<7> [33.705612] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   lines    1,   7,   8,   8,  11,  13,  13,  15,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
<7> [33.705634] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]  blocks   13, 113, 129, 129, 177, 209, 209, 241,  27 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
<7> [33.705655] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb   16, 126, 143, 143, 196, 231, 231, 267,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
<7> [33.705704] [drm:intel_bw_atomic_check [i915]] pipe A data rate 0 num active planes 0
<7> [33.705737] [drm:intel_dump_pipe_config [i915]] [CRTC:91:pipe A] enable: no [modeset]
<7> [33.705769] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 1A] fb: [NOFB], visible: no
<7> [33.705800] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2A] fb: [NOFB], visible: no
<7> [33.705831] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 3A] fb: [NOFB], visible: no
<7> [33.705863] [drm:intel_dump_pipe_config [i915]] [PLANE:55:plane 4A] fb: [NOFB], visible: no
<7> [33.705894] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 5A] fb: [NOFB], visible: no
<7> [33.705924] [drm:intel_dump_pipe_config [i915]] [PLANE:71:plane 6A] fb: [NOFB], visible: no
<7> [33.705962] [drm:intel_dump_pipe_config [i915]] [PLANE:79:plane 7A] fb: [NOFB], visible: no
<7> [33.705993] [drm:intel_dump_pipe_config [i915]] [PLANE:87:cursor A] fb: [NOFB], visible: no
<7> [33.714054] [drm:intel_psr_disable_locked [i915]] Disabling PSR2
<7> [33.714508] [drm:intel_edp_backlight_off [i915]] 
<7> [33.923505] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
<7> [33.923710] [drm:intel_disable_pipe [i915]] disabling pipe A
<7> [33.929718] [drm:intel_edp_panel_off.part.52 [i915]] Turn [ENCODER:275:DDI A] panel power off
<7> [33.929894] [drm:intel_edp_panel_off.part.52 [i915]] Wait for panel power off time
<7> [33.930110] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000060
<7> [33.984983] [drm:wait_panel_status [i915]] Wait complete
<7> [33.985088] [drm:intel_power_well_disable [i915]] disabling DDI A IO
<7> [33.985206] [drm:intel_power_well_disable [i915]] disabling AUX A
<7> [33.985341] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
<7> [33.985475] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 91
<7> [33.985584] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
<7> [33.985757] [drm:intel_atomic_commit_tail [i915]] [ENCODER:275:DDI A]
<7> [33.985822] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000088a, pins 0x00000010, long 0x00000010
<7> [33.985937] [drm:intel_atomic_commit_tail [i915]] [ENCODER:281:DDI B]
<7> [33.986024] [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:275:DDI A] - long
<7> [33.986094] [drm:intel_atomic_commit_tail [i915]] [ENCODER:283:DP-MST A]
<7> [33.986203] [drm:intel_atomic_commit_tail [i915]] [ENCODER:284:DP-MST B]
<7> [33.986280] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 10
<7> [33.986380] [drm:intel_atomic_commit_tail [i915]] [ENCODER:285:DP-MST C]
<7> [33.986455] [drm:intel_atomic_commit_tail [i915]] [ENCODER:286:DP-MST D]
<7> [33.986550] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:275:DDI A]
<7> [33.986627] [drm:intel_atomic_commit_tail [i915]] [ENCODER:296:DDI D]
<7> [33.986699] [drm:intel_atomic_commit_tail [i915]] [ENCODER:298:DP-MST A]
<7> [33.986771] [drm:intel_atomic_commit_tail [i915]] [ENCODER:299:DP-MST B]
<7> [33.986843] [drm:intel_atomic_commit_tail [i915]] [ENCODER:300:DP-MST C]
<7> [33.986917] [drm:intel_atomic_commit_tail [i915]] [ENCODER:301:DP-MST D]
<7> [33.987022] [drm:intel_atomic_commit_tail [i915]] [ENCODER:303:DDI E]
<7> [33.987120] [drm:intel_atomic_commit_tail [i915]] [ENCODER:306:DDI F]
<7> [33.987224] [drm:intel_atomic_commit_tail [i915]] [ENCODER:308:DP-MST A]
<7> [33.987367] [drm:intel_atomic_commit_tail [i915]] [ENCODER:309:DP-MST B]
<7> [33.987460] [drm:intel_atomic_commit_tail [i915]] [ENCODER:310:DP-MST C]
<7> [33.987541] [drm:intel_atomic_commit_tail [i915]] [ENCODER:311:DP-MST D]
<7> [33.987640] [drm:verify_connector_state [i915]] [CONNECTOR:276:eDP-1]
<7> [33.987739] [drm:verify_single_dpll_state.isra.152 [i915]] DPLL 0
<7> [33.987820] [drm:verify_single_dpll_state.isra.152 [i915]] DPLL 1
<7> [33.987924] [drm:verify_single_dpll_state.isra.152 [i915]] TBT PLL
<7> [33.988010] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 1
<7> [33.988096] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 2
<7> [33.988181] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 3
<7> [33.988295] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 4
<7> [33.988405] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 5
<7> [33.988488] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 6
<7> [33.988657] [drm:intel_atomic_commit_tail [i915]] [CRTC:91:pipe A]
<7> [33.988959] [drm:intel_power_well_disable [i915]] disabling DC off
<7> [33.989051] [drm:skl_enable_dc6 [i915]] Enabling DC6
<7> [33.989144] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
<7> [33.990301] [drm:intel_power_well_disable [i915]] disabling always-on
<7> [33.990763] i915 Wakeref last acquired:
   track_intel_runtime_pm_wakeref+0x14/0x90 [i915]
   intel_display_power_get+0x1f/0x60 [i915]
   intel_power_domains_init_hw+0xd3/0x600 [i915]
   i915_driver_probe+0xb49/0x15e0 [i915]
   i915_pci_probe+0x43/0x1b0 [i915]
   pci_device_probe+0x9e/0x120
   really_probe+0xea/0x420
   driver_probe_device+0x10b/0x120
<7> [33.990768] i915 Wakeref count: 11
<7> [33.991183] i915 Wakeref x1 taken at:
   track_intel_runtime_pm_wakeref+0x14/0x90 [i915]
   intel_display_power_get+0x1f/0x60 [i915]
   edp_panel_vdd_on+0xd5/0x210 [i915]
   intel_dp_aux_xfer+0xeb/0x8e0 [i915]
   intel_dp_aux_transfer+0xa7/0x200 [i915]
   drm_dp_dpcd_access+0x76/0x110
   drm_dp_dpcd_read+0x29/0xc0
   intel_dp_read_dpcd+0x38/0x120 [i915]
<7> [33.991923] i915 Wakeref x1 taken at:
   track_intel_runtime_pm_wakeref+0x14/0x90 [i915]
   intel_display_power_get+0x1f/0x60 [i915]
   intel_ddi_pre_pll_enable+0x6e/0x120 [i915]
   intel_encoders_pre_pll_enable.isra.51+0x61/0x80 [i915]
   haswell_crtc_enable+0x5c/0x790 [i915]
   intel_update_crtc+0x5c/0x350 [i915]
   skl_commit_modeset_enables+0x25d/0x2a0 [i915]
   intel_atomic_commit_tail+0x26b/0x1540 [i915]
<7> [33.992518] i915 Wakeref x1 taken at:
   track_intel_runtime_pm_wakeref+0x14/0x90 [i915]
   intel_display_power_get+0x1f/0x60 [i915]
   intel_ddi_pre_enable+0x5fb/0xe30 [i915]
   intel_encoders_pre_enable.isra.52+0x61/0x80 [i915]
   haswell_crtc_enable+0x82/0x790 [i915]
   intel_update_crtc+0x5c/0x350 [i915]
   skl_commit_modeset_enables+0x25d/0x2a0 [i915]
   intel_atomic_commit_tail+0x26b/0x1540 [i915]
<7> [33.992904] i915 Wakeref x1 taken at:
   track_intel_runtime_pm_wakeref+0x14/0x90 [i915]
   intel_display_power_get+0x1f/0x60 [i915]
   edp_panel_vdd_on+0xd5/0x210 [i915]
   intel_dp_aux_xfer+0xeb/0x8e0 [i915]
   intel_dp_aux_transfer+0x124/0x200 [i915]
   drm_dp_dpcd_access+0x76/0x110
   drm_dp_dpcd_write+0x21/0x90
   intel_dp_sink_dpms+0x4f/0x100 [i915]
<7> [33.993365] i915 Wakeref x1 taken at:
   track_intel_runtime_pm_wakeref+0x14/0x90 [i915]
   intel_display_power_get+0x1f/0x60 [i915]
   intel_ddi_get_power_domains+0x48/0x100 [i915]
   intel_modeset_setup_hw_state+0x866/0x13c0 [i915]
   intel_modeset_init+0x979/0x1be0 [i915]
   i915_driver_probe+0xb68/0x15e0 [i915]
   i915_pci_probe+0x43/0x1b0 [i915]
   pci_device_probe+0x9e/0x120
<7> [33.993790] i915 Wakeref x1 taken at:
   track_intel_runtime_pm_wakeref+0x14/0x90 [i915]
   intel_display_power_get+0x1f/0x60 [i915]
   intel_ddi_get_power_domains+0x6e/0x100 [i915]
   intel_modeset_setup_hw_state+0x866/0x13c0 [i915]
   intel_modeset_init+0x979/0x1be0 [i915]
   i915_driver_probe+0xb68/0x15e0 [i915]
   i915_pci_probe+0x43/0x1b0 [i915]
   pci_device_probe+0x9e/0x120
<7> [33.994223] i915 Wakeref x4 taken at:
   track_intel_runtime_pm_wakeref+0x14/0x90 [i915]
   intel_display_power_get+0x1f/0x60 [i915]
   modeset_get_crtc_power_domains+0x120/0x140 [i915]
   intel_modeset_setup_hw_state+0x111b/0x13c0 [i915]
   intel_modeset_init+0x979/0x1be0 [i915]
   i915_driver_probe+0xb68/0x15e0 [i915]
   i915_pci_probe+0x43/0x1b0 [i915]
   pci_device_probe+0x9e/0x120
<7> [33.994666] i915 Wakeref x1 taken at:
   track_intel_runtime_pm_wakeref+0x14/0x90 [i915]
   intel_display_power_get+0x1f/0x60 [i915]
   edp_panel_vdd_on+0xd5/0x210 [i915]
   intel_dp_aux_xfer+0xeb/0x8e0 [i915]
   intel_dp_aux_transfer+0xa7/0x200 [i915]
   drm_dp_dpcd_access+0x76/0x110
   drm_dp_dpcd_read+0x29/0xc0
   intel_dp_get_dsc_sink_cap+0x54/0xe0 [i915]
<7> [33.994874] [drm:drm_mode_setcrtc] [CRTC:152:pipe B]
<7> [33.995162] [drm:drm_mode_setcrtc] [CRTC:213:pipe C]
<7> [33.995419] [drm:drm_mode_setcrtc] [CRTC:274:pipe D]
<7> [33.995615] [drm:drm_mode_setcrtc] [CRTC:91:pipe A]
<7> [33.995675] [drm:drm_mode_setcrtc] [CONNECTOR:276:eDP-1]
<7> [33.995838] [drm:intel_atomic_check [i915]] [CONNECTOR:276:eDP-1] Limiting display bpp to 18 instead of EDID bpp 18, requested bpp 36, max platform bpp 36
<7> [33.995920] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max rate 270000 max bpp 18 pixel clock 214000KHz
<7> [33.995988] [drm:intel_dp_compute_config [i915]] Force DSC en = 0
<7> [33.996056] [drm:intel_dp_compute_config [i915]] DP lane count 2 clock 270000 bpp 18
<7> [33.996123] [drm:intel_dp_compute_config [i915]] DP link rate required 481500 available 540000
<7> [33.996193] [drm:intel_ddi_compute_config [i915]] DC3CO exit scanlines 1058
<7> [33.996293] [drm:intel_atomic_check [i915]] hw max bpp: 18, pipe bpp: 18, dithering: 1
<7> [33.996392] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_hdisplay (expected 0, found 1920)

<7> [33.996471] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_htotal (expected 0, found 2104)

<7> [33.996556] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_hblank_start (expected 0, found 1920)

<7> [33.996635] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_hblank_end (expected 0, found 2104)

<7> [33.996730] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_hsync_start (expected 0, found 1936)

<7> [33.996800] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_hsync_end (expected 0, found 1952)

<7> [33.996865] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vdisplay (expected 0, found 1080)

<7> [33.996940] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vtotal (expected 0, found 1128)

<7> [33.997010] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vblank_start (expected 0, found 1080)

<7> [33.997076] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vblank_end (expected 0, found 1128)

<7> [33.997141] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vsync_start (expected 0, found 1083)

<7> [33.997220] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_vsync_end (expected 0, found 1097)

<7> [33.997297] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.flags (2) (expected 0, found 2)

<7> [33.997390] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.flags (8) (expected 0, found 8)

<7> [33.997458] [drm:pipe_config_mismatch [i915]] fastset mismatch in base.adjusted_mode.crtc_clock (expected 0, found 214000)

<7> [33.997533] [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 172800 kHz, actual 172800 kHz
<7> [33.997599] [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 0, actual 0
<7> [33.997677] [drm:intel_find_shared_dpll [i915]] [CRTC:91:pipe A] allocated DPLL 0
<7> [33.997758] [drm:intel_reference_shared_dpll.isra.11 [i915]] using DPLL 0 for pipe A
<7> [33.997877] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb (   0 -    0) -> (   0 -  972), size    0 ->  972
<7> [33.997922] [drm:skl_compute_wm [i915]] [PLANE:87:cursor A] ddb (   0 -    0) -> ( 972 - 1024), size    0 ->   52
<7> [33.997968] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm
<7> [33.998012] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0 ->    1,   7,   8,   8,  11,  13,  13,  15,   0
<7> [33.998056] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   13, 113, 129, 129, 177, 209, 209, 241,  27
<7> [33.998100] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   16, 126, 143, 143, 196, 231, 231, 267,   0
<7> [33.998188] [drm:intel_bw_atomic_check [i915]] pipe A data rate 856000 num active planes 1
<7> [33.998271] [drm:intel_dump_pipe_config [i915]] [CRTC:91:pipe A] enable: yes [modeset]
<7> [33.998364] [drm:intel_dump_pipe_config [i915]] active: yes, output_types: EDP (0x100), output format: RGB
<7> [33.998443] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 18, dithering: 1
<7> [33.998513] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 7479842, gmch_n: 8388608, link_m: 415546, link_n: 524288, tu: 64
<7> [33.998583] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0, infoframes enabled: 0x0
<7> [33.998655] [drm:intel_dump_pipe_config [i915]] requested mode:
<7> [33.998663] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [33.998735] [drm:intel_dump_pipe_config [i915]] adjusted mode:
<7> [33.998745] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [33.998817] [drm:intel_dump_pipe_config [i915]] crtc timings: 214000 1920 1936 1952 2104 1080 1083 1097 1128, type: 0x48 flags: 0xa
<7> [33.998885] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 214000
<7> [33.998958] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
<7> [33.999025] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled, force thru: no
<7> [33.999091] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
<7> [33.999175] [drm:icl_dump_hw_state [i915]] dpll_hw_state: cfgcr0: 0x1c001a5, cfgcr1: 0x88, mg_refclkin_ctl: 0x0, hg_clktop2_coreclkctl1: 0x0, mg_clktop2_hsclkctl: 0x0, mg_pll_div0: 0x0, mg_pll_div2: 0x0, mg_pll_lf: 0x0, mg_pll_frac_lock: 0x0, mg_pll_ssc: 0x0, mg_pll_bias: 0x0, mg_pll_tdc_coldst_bias: 0x0
<7> [33.999246] [drm:intel_dump_pipe_config [i915]] csc_mode: 0x0 gamma_mode: 0x0 gamma_enable: 0 csc_enable: 0
<7> [33.999333] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 1A] fb: [FB:313] 1920x1080 format = XR24 little-endian (0x34325258), visible: yes
<7> [33.999397] [drm:intel_dump_pipe_config [i915]] 	rotation: 0x1, scaler: -1
<7> [33.999465] [drm:intel_dump_pipe_config [i915]] 	src: 1920.000000x1080.000000+0.000000+0.000000 dst: 1920x1080+0+0
<7> [33.999512] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2A] fb: [NOFB], visible: no
<7> [33.999559] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 3A] fb: [NOFB], visible: no
<7> [33.999607] [drm:intel_dump_pipe_config [i915]] [PLANE:55:plane 4A] fb: [NOFB], visible: no
<7> [33.999656] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 5A] fb: [NOFB], visible: no
<7> [33.999704] [drm:intel_dump_pipe_config [i915]] [PLANE:71:plane 6A] fb: [NOFB], visible: no
<7> [33.999753] [drm:intel_dump_pipe_config [i915]] [PLANE:79:plane 7A] fb: [NOFB], visible: no
<7> [33.999804] [drm:intel_dump_pipe_config [i915]] [PLANE:87:cursor A] fb: [NOFB], visible: no
<7> [34.001389] [drm:intel_power_well_enable [i915]] enabling always-on
<7> [34.001446] [drm:intel_power_well_enable [i915]] enabling DC off
<7> [34.002023] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
<7> [34.002130] [drm:intel_combo_phy_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [34.002204] [drm:intel_combo_phy_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [34.002404] [drm:intel_atomic_commit_tail [i915]] [ENCODER:275:DDI A]
<7> [34.002455] [drm:intel_atomic_commit_tail [i915]] [ENCODER:281:DDI B]
<7> [34.002515] [drm:intel_atomic_commit_tail [i915]] [ENCODER:283:DP-MST A]
<7> [34.002553] [drm:intel_atomic_commit_tail [i915]] [ENCODER:284:DP-MST B]
<7> [34.002590] [drm:intel_atomic_commit_tail [i915]] [ENCODER:285:DP-MST C]
<7> [34.002626] [drm:intel_atomic_commit_tail [i915]] [ENCODER:286:DP-MST D]
<7> [34.002665] [drm:intel_atomic_commit_tail [i915]] [ENCODER:296:DDI D]
<7> [34.002703] [drm:intel_atomic_commit_tail [i915]] [ENCODER:298:DP-MST A]
<7> [34.002741] [drm:intel_atomic_commit_tail [i915]] [ENCODER:299:DP-MST B]
<7> [34.002778] [drm:intel_atomic_commit_tail [i915]] [ENCODER:300:DP-MST C]
<7> [34.002815] [drm:intel_atomic_commit_tail [i915]] [ENCODER:301:DP-MST D]
<7> [34.002852] [drm:intel_atomic_commit_tail [i915]] [ENCODER:303:DDI E]
<7> [34.002895] [drm:intel_atomic_commit_tail [i915]] [ENCODER:306:DDI F]
<7> [34.002950] [drm:intel_atomic_commit_tail [i915]] [ENCODER:308:DP-MST A]
<7> [34.002990] [drm:intel_atomic_commit_tail [i915]] [ENCODER:309:DP-MST B]
<7> [34.003028] [drm:intel_atomic_commit_tail [i915]] [ENCODER:310:DP-MST C]
<7> [34.003066] [drm:intel_atomic_commit_tail [i915]] [ENCODER:311:DP-MST D]
<7> [34.003104] [drm:verify_single_dpll_state.isra.152 [i915]] DPLL 0
<7> [34.003151] [drm:verify_single_dpll_state.isra.152 [i915]] DPLL 1
<7> [34.003194] [drm:verify_single_dpll_state.isra.152 [i915]] TBT PLL
<7> [34.003240] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 1
<7> [34.003297] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 2
<7> [34.003341] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 3
<7> [34.003390] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 4
<7> [34.003435] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 5
<7> [34.003477] [drm:verify_single_dpll_state.isra.152 [i915]] TC PLL 6
<7> [34.003526] [drm:intel_power_well_enable [i915]] enabling AUX A
<7> [34.003573] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 91
<7> [34.003617] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
<7> [34.003689] [drm:edp_panel_on [i915]] Turn [ENCODER:275:DDI A] panel power on
<7> [34.003756] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
<7> [34.611720] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
<7> [34.611835] [drm:wait_panel_status [i915]] Wait complete
<7> [34.611989] [drm:edp_panel_on [i915]] Wait for panel power on
<7> [34.612201] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
<7> [34.680073] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000088a, pins 0x00000010, long 0x00000010
<7> [34.680158] [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:275:DDI A] - long
<7> [34.680235] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 20
<7> [34.680464] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:275:DDI A]
<7> [34.824962] [drm:wait_panel_status [i915]] Wait complete
<7> [34.825074] [drm:intel_power_well_enable [i915]] enabling DDI A IO
<7> [34.825593] [drm:edp_panel_vdd_on [i915]] Turning [ENCODER:275:DDI A] VDD on
<7> [34.825921] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
<7> [34.827107] [drm:intel_dp_start_link_train [i915]] Using LINK_RATE_SET value 03
<7> [34.828486] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
<7> [34.828597] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
<7> [34.828709] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
<7> [34.830098] [drm:intel_dp_start_link_train [i915]] clock recovery OK
<7> [34.830197] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
<7> [34.831833] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
<7> [34.832158] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:276:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
<7> [34.833472] [drm:intel_enable_pipe [i915]] enabling pipe A
<7> [34.833807] [drm:intel_edp_backlight_on [i915]] 
<7> [34.833927] [drm:intel_panel_enable_backlight [i915]] pipe A
<7> [34.834105] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000
<7> [34.834534] [drm:intel_psr_enable_locked [i915]] Enabling PSR2
<7> [34.835765] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
<7> [34.847905] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
<7> [34.847961] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
<7> [34.856153] [drm:verify_connector_state [i915]] [CONNECTOR:276:eDP-1]
<7> [34.856204] [drm:intel_atomic_commit_tail [i915]] [CRTC:91:pipe A]
<7> [34.856406] [drm:intel_ddi_get_config [i915]] [ENCODER:275:DDI A] Fec status: 0
<7> [34.856488] [drm:verify_single_dpll_state.isra.152 [i915]] DPLL 0
<7> [34.924722] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [35.139571] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [35.251486] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [35.363509] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [35.467543] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [35.579555] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [35.691575] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [35.803566] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [35.915500] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [36.027573] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [36.139488] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [36.251571] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [36.355492] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [36.467447] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [36.579498] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [36.691481] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [36.803541] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [36.915509] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [37.027433] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [37.131537] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [37.243430] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [37.355562] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [37.467449] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [37.580352] [drm:tgl_dc5_idle_thread [i915]] DC5/6 idle thread
<7> [37.607939] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb (   0 -  972) -> (   0 -    0), size  972 ->    0
<7> [37.607994] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm ->  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
<7> [37.608041] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   lines    1,   7,   8,   8,  11,  13,  13,  15,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
<7> [37.608086] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]  blocks   13, 113, 129, 129, 177, 209, 209, 241,  27 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
<7> [37.608140] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb   16, 126, 143, 143, 196, 231, 231, 267,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
<7> [37.608265] [drm:intel_bw_atomic_check [i915]] pipe A data rate 0 num active planes 0
<7> [37.619335] [drm:drm_mode_addfb2] [FB:313]
<7> [37.619399] [drm:drm_mode_addfb2] [FB:316]
<7> [37.647825] [drm:drm_mode_setcrtc] [CRTC:91:pipe A]
<7> [37.647956] [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 172800 kHz, actual 172800 kHz
<7> [37.647992] [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 0, actual 0
<7> [37.648051] [drm:skl_compute_wm [i915]] [PLANE:87:cursor A] ddb ( 972 - 1024) -> (   0 -    0), size   52 ->    0
<7> [37.648093] [drm:intel_dump_pipe_config [i915]] [CRTC:91:pipe A] enable: no [modeset]
<7> [37.648154] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 1A] fb: [NOFB], visible: no
<7> [37.648214] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2A] fb: [NOFB], visible: no
<7> [37.648278] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 3A] fb: [NOFB], visible: no
<7> [37.648358] [drm:intel_dump_pipe_config [i915]] [PLANE:55:plane 4A] fb: [NOFB], visible: no
<7> [37.648419] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 5A] fb: [NOFB], visible: no
<7> [37.648452] [drm:intel_dump_pipe_config [i915]] [PLANE:71:plane 6A] fb: [NOFB], visible: no
<7> [37.648484] [drm:intel_dump_pipe_config [i915]] [PLANE:79:plane 7A] fb: [NOFB], visible: no
<7> [37.648531] [drm:intel_dump_pipe_config [i915]] [PLANE:87:cursor A] fb: [NOFB], visible: no
<4> [37.653007] This is power.sh, remotely rebooting this machine

Is there any way to figure out why this abort was triggered?
Comment 7 Stanislav Lisovskiy 2019-10-17 08:45:25 UTC
Also there seems to be a GPU hang in gem tests which are happen to be before kms_flip, which then causes EINVAL in some gem_execbuffer ioctls and could also result in some issues and power well enable timeout, however it is not clear if this is related.
Comment 10 CI Bug Log 2019-10-25 12:50:48 UTC
A CI Bug Log filter associated to this bug has been updated:

{- TGL: igt@kms_flip_* - incomplete - system hang -}
{+ TGL: igt@kms_flip_* - incomplete - system hang +}

New failures caught by the filter:

  * https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7144/re-tgl-u/igt@kms_flip_event_leak.html


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