The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* TGL: igt@kms_big_fb@yf-tiled-addfb|igt@kms_concurrent@pipe-a|igt@kms_dp_dsc@basic-dsc-enable-edp - incomplete - system hang
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_big_fb@yf-tiled-addfb.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_concurrent@pipe-a.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/re-tgl1-display/igt@kms_dp_dsc@basic-dsc-enable-edp.html

Assessment:
All the boot logs show that for a hotplug on DP-1 , it asks for AUX B power enable for Combo PHY AUX power well enable which is not set in HSW_PWR_WELL_CTL_STATE and hence power well timeout. This can occur if TBT DP tunnel is down which looks like a case with this TGL board.

Manasi

So on boot log:
<7>[   21.974202] [drm:hsw_wait_for_power_well_enable.isra.13 [i915]] AUX B power well enable timeout
<4>[   21.974205] ------------[ cut here ]------------
<4>[   21.974208] WARN_ON(!power_well->desc->hsw.is_tc_tbt)

And this is then duplicate of https://bugs.freedesktop.org/show_bug.cgi?id=111996?

This warning will come only if it's not a TBT port, so definitely not TBT case. 

The signature of the issue is same, before accessing the Aux channel, we are trying to enable AUX_B, which is not getting enabled, getting timed-out. So this could be a duplicate.

- Shashank

*** This bug has been marked as a duplicate of bug 111996 ***