https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_389/fi-tgl-u2/igt@gem_eio@in-flight-contexts-10ms.html <6> [829.879662] Console: switching to colour dummy device 80x25 <6> [829.879703] [IGT] gem_eio: executing <5> [829.883819] Setting dangerous option reset - tainting kernel <5> [829.883857] Setting dangerous option reset - tainting kernel <6> [829.884230] i915 0000:00:02.0: GPU HANG: ecode 12:57:0x00000000, Manually set wedged engine mask = ffffffffffffffff <6> [829.884276] GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace. <6> [829.884277] Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel <6> [829.884278] drm/i915 developers can then reassign to the right component if it's not a kernel issue. <6> [829.884279] The GPU crash dump is required to analyze GPU hangs, so please always attach it. <6> [829.884280] GPU crash dump saved to /sys/class/drm/card0/error <7> [829.884537] [drm:intel_gt_reset_global [i915]] resetting chip <5> [829.885437] i915 0000:00:02.0: Resetting chip for Manually set wedged engine mask = ffffffffffffffff <6> [829.886585] [IGT] gem_eio: starting subtest in-flight-contexts-10ms <5> [829.890761] Setting dangerous option reset - tainting kernel <7> [829.918230] [drm:intel_gt_reset_global [i915]] resetting chip <5> [829.919227] i915 0000:00:02.0: Resetting chip for Manually set wedged engine mask = ffffffffffffffff <7> [829.919334] [drm:intel_gt_reset [i915]] GPU reset disabled <7> [829.919359] __intel_gt_set_wedged rcs0 <7> [829.919362] __intel_gt_set_wedged Awake? 131 <7> [829.919364] __intel_gt_set_wedged Hangcheck: 29 ms ago <7> [829.919373] __intel_gt_set_wedged Reset count: 0 (global 3) <7> [829.919375] __intel_gt_set_wedged Requests: <7> [829.919458] __intel_gt_set_wedged active 2112:2* prio=3 @ 29ms: gem_eio[2479] <7> [829.919474] __intel_gt_set_wedged ring->start: 0x007f3000 <7> [829.919476] __intel_gt_set_wedged ring->head: 0x00000000 <7> [829.919477] __intel_gt_set_wedged ring->tail: 0x000000a8 <7> [829.919478] __intel_gt_set_wedged ring->emit: 0x000000a8 <7> [829.919480] __intel_gt_set_wedged ring->space: 0x00003f18 <7> [829.919481] __intel_gt_set_wedged ring->hwsp: 0xffff9180 <7> [829.919483] __intel_gt_set_wedged [head 0000, postfix 0068, tail 00a8, batch 0x00000000_00040000]: <7> [829.919502] __intel_gt_set_wedged [0000] 02800101 7a000004 20344c1c 000000d0 00000000 00000000 00000000 02800100 <7> [829.919504] __intel_gt_set_wedged [0020] 7a000004 00304200 000000d0 00000000 00000000 00000000 02800000 00000000 <7> [829.919506] __intel_gt_set_wedged [0040] 10400002 ffff9180 00000000 00000001 04000001 18800101 00040000 00000000 <7> [829.919508] __intel_gt_set_wedged [0060] 04000000 00000000 7a000004 111072a1 ffff9180 00000000 00000002 00000000 <7> [829.919510] __intel_gt_set_wedged [0080] 01000000 04000001 0e40c003 00000000 ffffe0c8 00000000 00000000 00000000 <7> [829.919511] __intel_gt_set_wedged [00a0] 02800000 00000000 <7> [829.919522] __intel_gt_set_wedged Logical Ring Context: <7> [829.919524] __intel_gt_set_wedged [0000] 00000000 11081019 00002244 00090008 00002034 00000000 00002030 000000a8 <7> [829.919526] __intel_gt_set_wedged [0020] 00002038 007f3000 0000203c 00003001 00002168 00000000 00002140 00000000 <7> [829.919528] __intel_gt_set_wedged [0040] 00002110 00000020 000021c0 00000000 000021c4 00000000 000021c8 00000000 <7> [829.919530] __intel_gt_set_wedged [0060] 00002180 00000080 000022b4 00000000 00000000 00000000 00000000 00000000 <7> [829.919532] __intel_gt_set_wedged [0080] 00000000 11081011 000023a8 000001eb 0000228c 00000000 00002288 00000000 <7> [829.919533] __intel_gt_set_wedged [00a0] 00002284 00000000 00002280 00000000 0000227c 00000000 00002278 00000000 <7> [829.919535] __intel_gt_set_wedged [00c0] 00002274 00000004 00002270 97d05000 11081005 000021b0 00000000 000025a8 <7> [829.919537] __intel_gt_set_wedged [00e0] 00000000 000025ac 00000000 00000000 00000000 00000000 00000000 00000000 <7> [829.919539] __intel_gt_set_wedged [0100] 00000000 11080001 000020c8 80041000 61040001 00000000 00000000 00000000 <7> [829.919541] __intel_gt_set_wedged [0120] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 <7> [829.919543] __intel_gt_set_wedged [0140] 00000000 11081065 00002588 00000000 00002588 00000000 00002588 00000000 <7> [829.919545] __intel_gt_set_wedged [0160] 00002588 00000000 00002588 00000000 00002588 00000000 00002028 ffff0000 <7> [829.919546] __intel_gt_set_wedged [0180] 0000209c feff0000 000020c0 ffff0000 00002178 00000001 0000217c 00145855 <7> [829.919548] __intel_gt_set_wedged [01a0] 00002358 2e1e9d84 00002170 00000000 00002150 00000000 00002154 00000000 <7> [829.919550] __intel_gt_set_wedged [01c0] 00002158 00000001 0000241c 00000000 00002600 00000000 00002604 00000000 <7> [829.919552] __intel_gt_set_wedged [01e0] 00002608 00000000 0000260c 00000000 00002610 00000000 00002614 00000000 <7> [829.919554] __intel_gt_set_wedged [0200] 00002618 00000000 0000261c 00000000 00002620 00000000 00002624 00000000 <7> [829.919555] __intel_gt_set_wedged [0220] 00002628 00000000 0000262c 00000000 00002630 00000000 00002634 00000000 <7> [829.919557] __intel_gt_set_wedged [0240] 00002638 00000000 0000263c 00000000 00002640 00000000 00002644 00000000 <7> [829.919559] __intel_gt_set_wedged [0260] 00002648 00000000 0000264c 00000000 00002650 00000000 00002654 00000000 <7> [829.919560] __intel_gt_set_wedged [0280] 00002658 00000000 0000265c 00000000 00002660 00000000 00002664 00000000 <7> [829.919562] __intel_gt_set_wedged [02a0] 00002668 00000000 0000266c 00000000 00002670 00000000 00002674 00000000 <7> [829.919564] __intel_gt_set_wedged [02c0] 00002678 00000000 0000267c 00000000 00002068 0e40c003 00002084 00000100 <7> [829.919566] __intel_gt_set_wedged [02e0] 00000000 1102100f 00004400 00000000 00004404 00000000 00004408 00000000 <7> [829.919567] __intel_gt_set_wedged [0300] 0000440c 00000000 00004410 00000000 00004414 00000000 00004200 00000000 <7> [829.919569] __intel_gt_set_wedged [0320] 00004204 00000000 00000000 00000000 00000000 00000000 00000000 00000000 <7> [829.919571] __intel_gt_set_wedged [0340] 00000000 110810ad 000021f0 00000000 00002184 ffff0000 00002310 00000000 <7> [829.919573] __intel_gt_set_wedged [0360] 00002314 00000000 00002318 00000000 0000231c 00000000 00002320 00000000 <7> [829.919574] __intel_gt_set_wedged [0380] 00002324 00000000 00002300 00000000 00002304 00000000 00002308 00000000 <7> [829.919576] __intel_gt_set_wedged [03a0] 0000230c 00000000 00002328 00000000 0000232c 00000000 00002330 00000000 <7> [829.919578] __intel_gt_set_wedged [03c0] 00002334 00000000 00002338 00000000 0000233c 00000000 00002340 00000000 <7> [829.919579] __intel_gt_set_wedged [03e0] 00002344 00000000 000022c8 00000000 000022cc 00000000 000022d8 00000000 <7> [829.919581] __intel_gt_set_wedged [0400] 000022dc 00000000 00002580 ffff0001 00002500 00000000 00002504 00000000 <7> [829.919583] __intel_gt_set_wedged [0420] 00002508 00000000 00002400 00000000 00002404 00000000 00002408 00000000 <7> [829.919585] __intel_gt_set_wedged [0440] 0000240c 00000000 00002410 00000000 00002414 00000000 00002418 00000000 <7> [829.919587] __intel_gt_set_wedged [0460] 00002420 00000000 00002430 00000000 00002434 00000000 00002438 00000000 <7> [829.919588] __intel_gt_set_wedged [0480] 0000243c 00000000 00002440 00000000 00002690 00000000 00002694 00000000 <7> [829.919590] __intel_gt_set_wedged [04a0] 00002698 00000000 00002290 00000000 00002294 00000000 000022f0 00000000 <7> [829.919592] __intel_gt_set_wedged [04c0] 000022f4 00000000 000022f8 00000000 000022fc 00000000 0000215c 00000000 <7> [829.919594] __intel_gt_set_wedged [04e0] 00002480 00000000 00002484 00000000 00002490 00000000 00002494 00000000 <7> [829.919596] __intel_gt_set_wedged [0500] 00002194 00000000 00002198 00000000 00002360 00000000 00002364 00000000 <7> [829.919597] __intel_gt_set_wedged [0520] 00002448 00000000 0000244c 00000000 00002450 00000000 00002454 00000000 <7> [829.919599] __intel_gt_set_wedged [0540] 00002174 00000000 000020d8 ffff0000 00002478 00000000 0000247c 00000000 <7> [829.919601] __intel_gt_set_wedged [0560] 00002458 00000000 0000245c 00000000 00002460 00000000 00002464 00000000 <7> [829.919603] __intel_gt_set_wedged [0580] 00002468 00000000 0000246c 00000000 00002470 00000000 00002474 00000000 <7> [829.919605] __intel_gt_set_wedged [05a0] 000024a0 00000000 000024a4 00000000 000024a8 00000000 000024ac 00000000 <7> [829.919606] __intel_gt_set_wedged [05c0] 000025d0 00000000 000025d4 00000000 000025b0 00000000 000025b4 00000000 <7> [829.919608] __intel_gt_set_wedged [05e0] 000025d8 00000000 000025dc 00000000 000025b8 00000000 000025bc 00000000 <7> [829.919610] __intel_gt_set_wedged [0600] 00000000 11000001 0000e518 00008000 00000000 00000000 06800000 00000000 <7> [829.919612] __intel_gt_set_wedged [0620] 00000000 6904ff00 61010014 00000000 00000000 00000000 00000000 00000000 <7> [829.919613] __intel_gt_set_wedged [0640] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 <7> [829.919615] __intel_gt_set_wedged * <7> [829.919617] __intel_gt_set_wedged [0680] 61020001 00000000 00000000 79120000 00000000 79130000 00000000 79140000 <7> [829.919618] __intel_gt_set_wedged [06a0] 00000000 79150000 00000000 79160000 00000000 79190002 00000000 00000000 <7> [829.919620] __intel_gt_set_wedged [06c0] 00000000 791a0002 00000000 00000000 00000000 791b0002 00000000 00000000 <7> [829.919622] __intel_gt_set_wedged [06e0] 00000000 03000001 79220002 00000000 00000000 00000000 61050000 ffff0000 <7> [829.919624] __intel_gt_set_wedged [0700] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 <7> [829.919625] __intel_gt_set_wedged * <7> [829.919627] __intel_gt_set_wedged [0740] 00000000 11001027 00005200 00000000 00005204 00000000 00005208 00000000 <7> [829.919628] __intel_gt_set_wedged [0760] 0000520c 00000000 00005210 00000000 00005214 00000000 00005218 00000000 <7> [829.919630] __intel_gt_set_wedged [0780] 0000521c 00000000 00005240 00000000 00005244 00000000 00005248 00000000 <7> [829.919632] __intel_gt_set_wedged [07a0] 0000524c 00000000 00005250 00000000 00005254 00000000 00005258 00000000 <7> [829.919634] __intel_gt_set_wedged [07c0] 0000525c 00000000 00005280 00000000 00005284 00000000 00005288 00000000 <7> [829.919636] __intel_gt_set_wedged [07e0] 0000528c 00000000 00000000 00000000 00000000 79170101 00000000 00000000 <7> [829.919637] __intel_gt_set_wedged [0800] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 <7> [829.919639] __intel_gt_set_wedged * <7> [829.919640] __intel_gt_set_wedged [0c00] 780a0003 00000000 00000000 00000000 00000000 78080083 00004000 00000000 <7> [829.919642] __intel_gt_set_wedged [0c20] 00000000 00000000 04004000 00000000 00000000 00000000 08004000 00000000 <7> [829.919644] __intel_gt_set_wedged [0c40] 00000000 00000000 0c004000 00000000 00000000 00000000 10004000 00000000 <7> [829.919646] __intel_gt_set_wedged [0c60] 00000000 00000000 14004000 00000000 00000000 00000000 18004000 00000000 <7> [829.919648] __intel_gt_set_wedged [0c80] 00000000 00000000 1c004000 00000000 00000000 00000000 20004000 00000000 <7> [829.919649] __intel_gt_set_wedged [0ca0] 00000000 00000000 24004000 00000000 00000000 00000000 28004000 00000000
The CI Bug Log issue associated to this bug has been updated. ### New filters associated * TGL: igt@gem_eio@in-flight-contexts-10ms - incompletye - system hang - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_389/fi-tgl-u2/igt@gem_eio@in-flight-contexts-10ms.html
A CI Bug Log filter associated to this bug has been updated: {- TGL: igt@gem_eio@in-flight-contexts-10ms - incompletye - system hang -} {+ TGL: igt@gem_eio@in-flight-* - incomplete - system hang +} New failures caught by the filter: * https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7160/shard-tglb6/igt@gem_eio@in-flight-immediate.html
-- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/drm/intel/issues/534.
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