Bug 112218 - [CI][SHARDS] igt@i915_pm_dc@dc3co-vpb-simulation - skip - Test requirement: edp_psr2_enabled(data), , PSR2 is not enabled
Summary: [CI][SHARDS] igt@i915_pm_dc@dc3co-vpb-simulation - skip - Test requirement: e...
Status: RESOLVED NOTABUG
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: DRI git
Hardware: Other All
: not set not set
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2019-11-06 08:46 UTC by Lakshmi
Modified: 2019-11-06 08:48 UTC (History)
1 user (show)

See Also:
i915 platform: ICL
i915 features: display/PSR


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Description Lakshmi 2019-11-06 08:46:47 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5262/shard-iclb8/igt@i915_pm_dc@dc3co-vpb-simulation.html
IGT-Version: 1.24-g2d2fd6ce4 (x86_64) (Linux: 5.4.0-rc6-CI-CI_DRM_7259+ x86_64)
Runtime PM support: 1
DMC: fw loaded: yes
Starting subtest: dc3co-vpb-simulation
Test requirement not met in function setup_dc3co, file ../tests/i915/i915_pm_dc.c:311:
Test requirement: edp_psr2_enabled(data)
PSR2 is not enabled
Last errno: 22, Invalid argument
Subtest dc3co-vpb-simulation: SKIP (0.022s)

Boot log shows <7>[   11.709737] [drm:intel_psr_init_dpcd [i915]] eDP panel supports PSR version 1

I assume this issue is expected on on this machine.
Comment 1 CI Bug Log 2019-11-06 08:48:07 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* ICL: igt@i915_pm_dc@dc3co-vpb-simulation - skip - Test requirement: edp_psr2_enabled\(data\), PSR2 is not enabled
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3625/shard-iclb1/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3631/shard-iclb3/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5262/shard-iclb8/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7260/shard-iclb3/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_5274/shard-iclb8/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15125/shard-iclb7/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15127/shard-iclb1/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb4/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3651/shard-iclb7/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5263/shard-iclb1/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3652/shard-iclb1/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15129/shard-iclb5/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15130/shard-iclb6/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15131/shard-iclb5/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15132/shard-iclb5/igt@i915_pm_dc@dc3co-vpb-simulation.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3655/shard-iclb1/igt@i915_pm_dc@dc3co-vpb-simulation.html


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