Created attachment 20123 [details] xorg.0.log System Environment: -------------------------- --Platform:915gv --Architecture(32-bit,64-bit,compatiblity):32bit GEM_kernel (drm-intel-next) 2db46b5668dfed59acacd75dfc49ecf947ea5aeb Libdrm: (master)87e90c73620b88005fcca5fd40aaaad0b08932e1 Mesa: (master)df94fd17647937975df031dcaa1ac24b2d79ce1b Xserver: (master)b4ca9dc2393ace2415163094b916f0d17ecba9ee Xf86_video_intel: (master)226efa7c74c0ed8a7b974a3727c5d7322c8ef815 Bug detailed description: ------------------------- startx ,run glean cases.on 915gv, a lot of glean cases run failed,for example,blendFunc,fragProg1,logicOp,orthoPosRandTris,orthoPosRandRects ...and so on.we just get 13 pass in 42 cases.
Created attachment 20124 [details] xorg conf file
(insert usual question here about readpix demo)
Haien, please try readpix, though I know it's troublesome as the machine is in AutoDTI lab.
(In reply to comment #3) > Haien, please try readpix, though I know it's troublesome as the machine is in > AutoDTI lab. > readpix and gearbox also failed.
(In reply to comment #4) > (In reply to comment #3) > > Haien, please try readpix, though I know it's troublesome as the machine is in > > AutoDTI lab. > > > > readpix and gearbox also failed. > btw,readipx and gearbox can work well if set tiling off.
Please attach the screenshot of readpix, as well as dmidecode output. From the registers, it looks like you've got a single channel of memory and no extra swizzling occurring, and the code at that time should have handled it correctly.
dmidecode |grep -A16 "Memory Device$" shows Memory Device Array Handle: 0x1000 Error Information Handle: Not Provided Total Width: 64 bits Data Width: 64 bits Size: 256 MB Form Factor: DIMM Set: None Locator: DIMM_1 Bank Locator: Not Specified Type: DDR Type Detail: Synchronous Speed: 533 MHz (1.9 ns) Manufacturer: FFFFFFFFFFFFFFFF Serial Number: FFFFFFFF Asset Tag: Not Specified Part Number: -- Memory Device Array Handle: 0x1000 Error Information Handle: Not Provided Total Width: 64 bits Data Width: 64 bits Size: 256 MB Form Factor: DIMM Set: None Locator: DIMM_2 Bank Locator: Not Specified Type: DDR Type Detail: Synchronous Speed: 533 MHz (1.9 ns) Manufacturer: CE00000000000000 Serial Number: 73111D28 Asset Tag: Not Specified Part Number: M3 78T3354CZ3-CD5
Created attachment 23891 [details] xorg.0.log with tiling on
Created attachment 23892 [details] screenshot
sorry,this is 915gv, not 915gm. The previous log was wrong
Still requires ModeDebug.
Created attachment 23952 [details] xorg.0.log with Modedebug on
(In reply to comment #11) > Still requires ModeDebug. > ok, Xorg.0.log with Modedebug on is re-attached
Likely fixed by: commit a243a32388e4828dc5fe8e9dd129a3042bf5b6b3 Author: Eric Anholt <eric@anholt.net> Date: Thu Mar 12 16:27:11 2009 -0700 drm/i915: Change DCC tiling detection case to cover only mobile parts. Later spec investigation has revealed that every 9xx mobile part has had this register in this format. Also, no non-mobile parts have been shown to have this register. So make all mobile use the same code, and all non-mobile use the hack 965 detection. Signed-off-by: Eric Anholt <eric@anholt.net>
still fails against this commit.so reopen it.
remove from Q1 release blocker
commit 7c8bed62e0165a0be3363f7abf81bf9e30341e00 Author: Eric Anholt <eric@anholt.net> Date: Fri Oct 30 15:33:11 2009 -0700 intel: Use GTT mapping when available for swrast. This improves piglit quick.tests runtime from 19:33 minutes to 6:06 on my GM45. It should also hide most of the A17 swizzling issues, though they'll still exist when swapping occurs (which is the kernel's problem either way).
this machine is not in our control now, closing.
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