Bug 20317 - GM45: black screen at Xorg startup
Summary: GM45: black screen at Xorg startup
Status: RESOLVED FIXED
Alias: None
Product: xorg
Classification: Unclassified
Component: Driver/intel (show other bugs)
Version: 7.4 (2008.09)
Hardware: x86-64 (AMD64) Linux (All)
: medium normal
Assignee: Wang Zhenyu
QA Contact: Xorg Project Team
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2009-02-25 16:51 UTC by Andy Isaacson
Modified: 2009-02-25 19:04 UTC (History)
0 users

See Also:
i915 platform:
i915 features:


Attachments
Xorg.0.log from e6400 with black-screen failure mode (29.55 KB, text/plain)
2009-02-25 16:53 UTC, Andy Isaacson
no flags Details

Description Andy Isaacson 2009-02-25 16:51:10 UTC
On this Dell E6400, approximately 1 out of 20 reboots, Xorg starts up but the screen remains black.  The backlight turns on and I can log in (blindly), Gnome startup sounds play, I can start apps, and "xrandr -d :0 --output LVDS --off" turns off the backlight while "--auto" turns it back on (but the screen remains black).

Switching to a VT and back to X generally clears up the problem.

A reg_dump while the screen is black shows:
(II): DumpRegsBegin
(II):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
(II):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
(II):            DPLL_TEST: 0x00010001 ()
(II):         CACHE_MODE_0: 0x00006820
(II):              D_STATE: 0x00000000
(II):        DSPCLK_GATE_D: 0x1000000c (clock gates disabled: VRHUNIT OVRUNIT OVCUNIT)
(II):       RENCLK_GATE_D1: 0x00000000
(II):       RENCLK_GATE_D2: 0x00000000
(II):                SDVOB: 0x0000089c (disabled, pipe A, stall disabled, detected)
(II):                SDVOC: 0x0000089c (disabled, pipe A, stall disabled, detected)
(II):              SDVOUDI: 0x00000000
(II):               DSPARB: 0x00000000
(II):               DSPFW1: 0x3f8f0f0f
(II):               DSPFW2: 0x150f0f0f
(II):               DSPFW3: 0x00000000
(II):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
(II):                 LVDS: 0xc2208300 (enabled, pipe B, 18 bit, 1 channel)
(II):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
(II):                 DVOB: 0x0000089c (disabled, pipe A, no stall, +hsync, +vsync)
(II):                 DVOC: 0x0000089c (disabled, pipe A, no stall, +hsync, +vsync)
(II):          DVOA_SRCDIM: 0x00000000
(II):          DVOB_SRCDIM: 0x00000000
(II):          DVOC_SRCDIM: 0x00000000
(II):           PP_CONTROL: 0x00000001 (power target: on)
(II):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
(II):         PFIT_CONTROL: 0x00000000
(II):      PFIT_PGM_RATIOS: 0x08000800
(II):      PORT_HOTPLUG_EN: 0x38000120
(II):    PORT_HOTPLUG_STAT: 0x08000000
(II):             DSPACNTR: 0x58000400 (disabled, pipe A)
(II):           DSPASTRIDE: 0x00001400 (5120 bytes)
(II):              DSPAPOS: 0x00000000 (0, 0)
(II):             DSPASIZE: 0x00000000 (1, 1)
(II):             DSPABASE: 0x00000000
(II):             DSPASURF: 0x00100000
(II):          DSPATILEOFF: 0x00000000
(II):            PIPEACONF: 0x00000000 (disabled, inactive)
(II):             PIPEASRC: 0x04ff03ff (1280, 1024)
(II):            PIPEASTAT: 0x00000000 (status:)
(II):                 FPA0: 0x00031305 (n = 3, m1 = 19, m2 = 5)
(II):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II):               DPLL_A: 0x14020003 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10)
(II):            DPLL_A_MD: 0x00000000
(II):             HTOTAL_A: 0x06af04ff (1280 active, 1712 total)
(II):             HBLANK_A: 0x06af04ff (1280 start, 1712 end)
(II):              HSYNC_A: 0x05d70557 (1368 start, 1496 end)
(II):             VTOTAL_A: 0x044f03ff (1024 active, 1104 total)
(II):             VBLANK_A: 0x044f03ff (1024 start, 1104 end)
(II):              VSYNC_A: 0x04090402 (1027 start, 1034 end)
(II):            BCLRPAT_A: 0x00000000
(II):         VSYNCSHIFT_A: 0x00000000
(II):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
(II):           DSPBSTRIDE: 0x00001400 (5120 bytes)
(II):              DSPBPOS: 0x00000000 (0, 0)
(II):             DSPBSIZE: 0x00000000 (1, 1)
(II):             DSPBBASE: 0x00000000
(II):             DSPBSURF: 0x00100000
(II):          DSPBTILEOFF: 0x00000000
(II):            PIPEBCONF: 0xc0000000 (enabled, active)
(II):             PIPEBSRC: 0x04ff031f (1280, 800)
(II):            PIPEBSTAT: 0x80400206 (status: FIFO_UNDERRUN LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
(II):                 FPB0: 0x00031009 (n = 3, m1 = 16, m2 = 9)
(II):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II):               DPLL_B: 0x98026000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
(II):            DPLL_B_MD: 0x00000000
(II):             HTOTAL_B: 0x059704ff (1280 active, 1432 total)
(II):             HBLANK_B: 0x059704ff (1280 start, 1432 end)
(II):              HSYNC_B: 0x05470527 (1320 start, 1352 end)
(II):             VTOTAL_B: 0x0347031f (800 active, 840 total)
(II):             VBLANK_B: 0x0347031f (800 start, 840 end)
(II):              VSYNC_B: 0x032f0327 (808 start, 816 end)
(II):            BCLRPAT_B: 0x00000000
(II):         VSYNCSHIFT_B: 0x00000000
(II):    VCLK_DIVISOR_VGA0: 0x00031108
(II):    VCLK_DIVISOR_VGA1: 0x00031406
(II):        VCLK_POST_DIV: 0x00020002
(II):             VGACNTRL: 0x80000000 (disabled)
(II):               TV_CTL: 0x000c0010
(II):               TV_DAC: 0x70000000
(II):             TV_CSC_Y: 0x0332012d
(II):            TV_CSC_Y2: 0x07d30104
(II):             TV_CSC_U: 0x0733052d
(II):            TV_CSC_U2: 0x05c70200
(II):             TV_CSC_V: 0x0340030c
(II):            TV_CSC_V2: 0x06d00200
(II):         TV_CLR_KNOBS: 0x00606000
(II):         TV_CLR_LEVEL: 0x010b00e1
(II):           TV_H_CTL_1: 0x00400359
(II):           TV_H_CTL_2: 0x80480022
(II):           TV_H_CTL_3: 0x007c0344
(II):           TV_V_CTL_1: 0x00f01415
(II):           TV_V_CTL_2: 0x00060607
(II):           TV_V_CTL_3: 0x80120001
(II):           TV_V_CTL_4: 0x000900f0
(II):           TV_V_CTL_5: 0x000a00f0
(II):           TV_V_CTL_6: 0x000900f0
(II):           TV_V_CTL_7: 0x000a00f0
(II):          TV_SC_CTL_1: 0xc1710088
(II):          TV_SC_CTL_2: 0x4e2d1dc8
(II):          TV_SC_CTL_3: 0x00000000
(II):           TV_WIN_POS: 0x00360024
(II):          TV_WIN_SIZE: 0x02640198
(II):      TV_FILTER_CTL_1: 0x8000085e
(II):      TV_FILTER_CTL_2: 0x00028283
(II):      TV_FILTER_CTL_3: 0x00014141
(II):        TV_CC_CONTROL: 0x00000000
(II):           TV_CC_DATA: 0x00000000
(II):          TV_H_LUMA_0: 0xb1403000
(II):         TV_H_LUMA_59: 0x0000b060
(II):        TV_H_CHROMA_0: 0xb1403000
(II):       TV_H_CHROMA_59: 0x0000b060
(II):         FBC_CFB_BASE: 0x00020000
(II):          FBC_LL_BASE: 0x00000000
(II):          FBC_CONTROL: 0x20000080
(II):          FBC_COMMAND: 0x08c80032
(II):           FBC_STATUS: 0x00000000
(II):         FBC_CONTROL2: 0x00000000
(II):        FBC_FENCE_OFF: 0x41007400
(II):          FBC_MOD_NUM: 0x00000000
(II):              MI_MODE: 0x00000200
(II):         MI_ARB_STATE: 0x00000040
(II):       MI_RDRET_STATE: 0x00000000
(II):              ECOSKPD: 0x00000307
(II):                 DP_B: 0x0000001c
(II):       DPB_AUX_CH_CTL: 0x01450085
(II):     DPB_AUX_CH_DATA1: 0x00000000
(II):     DPB_AUX_CH_DATA2: 0x00000000
(II):     DPB_AUX_CH_DATA3: 0x00000000
(II):     DPB_AUX_CH_DATA4: 0x00000000
(II):     DPB_AUX_CH_DATA5: 0x00000000
(II):                 DP_C: 0x0000001c
(II):       DPC_AUX_CH_CTL: 0x01450085
(II):     DPC_AUX_CH_DATA1: 0x00000000
(II):     DPC_AUX_CH_DATA2: 0x00000000
(II):     DPC_AUX_CH_DATA3: 0x00000000
(II):     DPC_AUX_CH_DATA4: 0x00000000
(II):     DPC_AUX_CH_DATA5: 0x00000000
(II):                 DP_D: 0x0000001c
(II):       DPD_AUX_CH_CTL: 0x00050000
(II):     DPD_AUX_CH_DATA1: 0x00000000
(II):     DPD_AUX_CH_DATA2: 0x00000000
(II):     DPD_AUX_CH_DATA3: 0x00000000
(II):     DPD_AUX_CH_DATA4: 0x00000000
(II):     DPD_AUX_CH_DATA5: 0x00000000
(II): SDVO phase shift 0 out of range -- probobly not an issue.
(II): pipe A dot 107520 n 3 m1 19 m2 5 p1 2 p2 10
(II): SDVO phase shift 0 out of range -- probobly not an issue.
(II): pipe B dot 72142 n 3 m1 16 m2 9 p1 2 p2 14
(II): DumpRegsEnd

I note that "PIPEBSTAT: 0x80400206 (status: FIFO_UNDERRUN" reminds me of #19794.
Comment 1 Andy Isaacson 2009-02-25 16:53:21 UTC
Created attachment 23298 [details]
Xorg.0.log from e6400 with black-screen failure mode
Comment 2 Gordon Jin 2009-02-25 17:26:46 UTC
Let zhenyu to decide if it's dup with #17292.

driver version 2.4.1 you are using is too old for this new hardware. You should probably use >=2.6.1, which contains 17292 fix.
Comment 3 Wang Zhenyu 2009-02-25 17:38:39 UTC
For G4X hardware, older driver already has known issue that doesn't work right with memory config, etc. So please try recent driver >= 2.6.1 should be fine. And if there's still issue exist for new driver, attach X log with ModeDebug option on, and dmesg output.
Comment 4 Andy Isaacson 2009-02-25 19:04:45 UTC
(In reply to comment #3)
> For G4X hardware, older driver already has known issue that doesn't work right
> with memory config, etc. So please try recent driver >= 2.6.1 should be fine.
> And if there's still issue exist for new driver, attach X log with ModeDebug
> option on, and dmesg output.

Thanks, I gave it 45 reboots with

xserver-xorg-video-intel   2:2.6.1-1ubuntu1~intrepid1

and did not see the black screen on startup, so I suspect it is fixed.  Previously I saw three black screens in 25 reboots.

Bug 19794 is still showing up, though.


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