Bug 21708 - [GM965][KMS] wrong mode on DVI1 after resume from S3
Summary: [GM965][KMS] wrong mode on DVI1 after resume from S3
Status: RESOLVED FIXED
Alias: None
Product: xorg
Classification: Unclassified
Component: Driver/intel (show other bugs)
Version: 7.4 (2008.09)
Hardware: x86-64 (AMD64) Linux (All)
: medium normal
Assignee: ykzhao
QA Contact: Xorg Project Team
URL:
Whiteboard:
Keywords: NEEDINFO
Depends on:
Blocks:
 
Reported: 2009-05-12 14:06 UTC by Dariush Forouher
Modified: 2009-07-10 14:40 UTC (History)
0 users

See Also:
i915 platform:
i915 features:


Attachments
intel_reg_dumper before and after (30.00 KB, application/x-tar)
2009-05-12 14:15 UTC, Dariush Forouher
no flags Details
restore the modeset for every activated crtc (1.11 KB, patch)
2009-07-02 01:55 UTC, ykzhao
no flags Details | Splinter Review

Description Dariush Forouher 2009-05-12 14:06:46 UTC
System :
--------
Platform: Dell Latitude D630
kernel: 2.6.30-rc4-00364-gfed4ea5
chipset: 965GM
system architecture: x86_64
distro: debian stable/unstable

Problem description:
--------------------
When doing Suspend2Ram, after resuming my DVI1 output has a bad mode.
Unfortunately it doesn't say which exactly. The system remains stable,
and after (re)starting the X-Server the DVI1 output returns into a valid
state. 
This problem is independent of X, it also occurs when suspending by hand from a console. The problem is 100% reproducible.

Steps to reproduce:
1. Connect a display to the DVI output and boot with it (my Laptop lid was closed the whole time).
2. log into a tty (no X running)
3. echo mem >/sys/power/state
4. resume laptop



This is the xrandr output of my setup:

$ xrandr
Screen 0: minimum 320 x 200, current 1600 x 1200, maximum 8192 x 8192
VGA1 connected (normal left inverted right x axis y axis)
   1280x1024      60.0 +   75.0     60.0  
   1600x1024      60.2  
   1400x1050      60.0  
   1440x900       59.9  
   1280x960       60.0  
   1360x768       59.8  
   1152x864       75.0     75.0     70.0     60.0  
   1024x768       75.1     75.0     70.1     60.0  
   832x624        74.6  
   800x600        72.2     75.0     60.3     56.2  
   640x480        72.8     75.0     72.8     75.0     66.7     60.0     59.9  
   720x400        70.1  
LVDS1 connected (normal left inverted right x axis y axis)
   1440x900       60.1 +
DVI1 connected 1600x1200+0+0 (normal left inverted right x axis y axis) 408mm x 306mm
   1600x1200      60.0*+
   1280x1024      75.0  
   1152x864       75.0  
   1024x768       75.1     70.1     60.0  
   832x624        74.6  
   800x600        72.2     75.0     60.3     56.2  
   640x480        72.8     75.0     66.7     60.0  
   720x400        70.1  
TV1 disconnected (normal left inverted right x axis y axis)
Comment 1 Dariush Forouher 2009-05-12 14:15:24 UTC
Created attachment 25804 [details]
intel_reg_dumper before and after

Diff:

--- regs_before	2009-05-12 23:09:14.000000000 +0200
+++ regs_after	2009-05-12 23:09:49.000000000 +0200
@@ -43,7 +43,7 @@
 (II):           PP_DIVISOR: 0x003e7f07
 (II):         PFIT_CONTROL: 0x20000000
 (II):      PFIT_PGM_RATIOS: 0x0d551000
-(II):      PORT_HOTPLUG_EN: 0x06040220
+(II):      PORT_HOTPLUG_EN: 0x06040200
 (II):    PORT_HOTPLUG_STAT: 0x00000300
 (II):             DSPACNTR: 0xd8000000 (enabled, pipe A)
 (II):           DSPASTRIDE: 0x00001900 (6400 bytes)
@@ -54,7 +54,7 @@
 (II):          DSPATILEOFF: 0x00000000
 (II):            PIPEACONF: 0xc0000000 (enabled, active)
 (II):             PIPEASRC: 0x063f04af (1600, 1200)
-(II):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
+(II):            PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
 (II):                 FPA0: 0x00051406 (n = 5, m1 = 20, m2 = 6)
 (II):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
 (II):               DPLL_A: 0xd4010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10)
@@ -93,40 +93,40 @@
 (II):    VCLK_DIVISOR_VGA1: 0x00031406
 (II):        VCLK_POST_DIV: 0x00020002
 (II):             VGACNTRL: 0x80000000 (disabled)
-(II):               TV_CTL: 0x000c00c0
+(II):               TV_CTL: 0x100000c0
 (II):               TV_DAC: 0x70000000
-(II):             TV_CSC_Y: 0x0332012d
-(II):            TV_CSC_Y2: 0x07d30104
-(II):             TV_CSC_U: 0x0733052d
-(II):            TV_CSC_U2: 0x05c70200
-(II):             TV_CSC_V: 0x0340030c
-(II):            TV_CSC_V2: 0x06d00200
-(II):         TV_CLR_KNOBS: 0x00404000
-(II):         TV_CLR_LEVEL: 0x010b00e1
-(II):           TV_H_CTL_1: 0x00400359
-(II):           TV_H_CTL_2: 0x80480022
-(II):           TV_H_CTL_3: 0x007c0344
-(II):           TV_V_CTL_1: 0x00f01415
-(II):           TV_V_CTL_2: 0x00060607
-(II):           TV_V_CTL_3: 0x80120001
-(II):           TV_V_CTL_4: 0x000900f0
-(II):           TV_V_CTL_5: 0x000a00f0
-(II):           TV_V_CTL_6: 0x000900f0
-(II):           TV_V_CTL_7: 0x000a00f0
-(II):          TV_SC_CTL_1: 0xc1710087
-(II):          TV_SC_CTL_2: 0x6b405140
+(II):             TV_CSC_Y: 0x00000000
+(II):            TV_CSC_Y2: 0x00000000
+(II):             TV_CSC_U: 0x00000000
+(II):            TV_CSC_U2: 0x00000000
+(II):             TV_CSC_V: 0x00000000
+(II):            TV_CSC_V2: 0x00000000
+(II):         TV_CLR_KNOBS: 0x00000000
+(II):         TV_CLR_LEVEL: 0x00000000
+(II):           TV_H_CTL_1: 0x00000000
+(II):           TV_H_CTL_2: 0x00000000
+(II):           TV_H_CTL_3: 0x00000000
+(II):           TV_V_CTL_1: 0x00000000
+(II):           TV_V_CTL_2: 0x00000000
+(II):           TV_V_CTL_3: 0x00000000
+(II):           TV_V_CTL_4: 0x00000000
+(II):           TV_V_CTL_5: 0x00000000
+(II):           TV_V_CTL_6: 0x00000000
+(II):           TV_V_CTL_7: 0x00000000
+(II):          TV_SC_CTL_1: 0x00000000
+(II):          TV_SC_CTL_2: 0x00000000
 (II):          TV_SC_CTL_3: 0x00000000
-(II):           TV_WIN_POS: 0x00360024
-(II):          TV_WIN_SIZE: 0x02640198
-(II):      TV_FILTER_CTL_1: 0x80000a75
-(II):      TV_FILTER_CTL_2: 0x0002f0f1
-(II):      TV_FILTER_CTL_3: 0x00017878
+(II):           TV_WIN_POS: 0x00000000
+(II):          TV_WIN_SIZE: 0x00000000
+(II):      TV_FILTER_CTL_1: 0x00000000
+(II):      TV_FILTER_CTL_2: 0x00000000
+(II):      TV_FILTER_CTL_3: 0x00000000
 (II):        TV_CC_CONTROL: 0x00000000
 (II):           TV_CC_DATA: 0x00000000
-(II):          TV_H_LUMA_0: 0xb1403000
-(II):         TV_H_LUMA_59: 0x0000b060
-(II):        TV_H_CHROMA_0: 0xb1403000
-(II):       TV_H_CHROMA_59: 0x0000b060
+(II):          TV_H_LUMA_0: 0x00000000
+(II):         TV_H_LUMA_59: 0x00000000
+(II):        TV_H_CHROMA_0: 0x00000000
+(II):       TV_H_CHROMA_59: 0x00000000
 (II):         FBC_CFB_BASE: 0x00000000
 (II):          FBC_LL_BASE: 0x00000000
 (II):          FBC_CONTROL: 0x00000000
Comment 2 Jesse Barnes 2009-06-23 17:27:52 UTC
Does this still happen with more recent kernels and/or drivers?  The register dump doesn't indicate anything wrong with the mode...
Comment 3 Dariush Forouher 2009-06-23 23:46:14 UTC
Yes, it still happens with 2.6.30.

(One clarification: The error message "the mode is wrong" is coming
from my display. If this diagnosis is really accurate I can't really verify)

Out of curiosity I also tried out your patch from intel-gfx "[PATCH] drm/i915: correct suspend/resume ordering". It didn't fix the problem.

I'd be glad to run more tests to track this problem down.
If you can point to anything (debug knobs in the kernel, patches, tools to dump registers etc.) I'll happily test them out.

ciao
Dariush
Comment 4 ykzhao 2009-07-02 01:55:52 UTC
Created attachment 27326 [details] [review]
restore the modeset for every activated crtc

Will you please try the attached patch on the latest linus git tree and see whether the issue still exists?
   
Thanks.
Comment 5 Dariush Forouher 2009-07-02 11:29:42 UTC
Nope, your patch fixes the problem.

Thank you very much! :)

cheers
Dariush
Comment 6 Eric Anholt 2009-07-10 14:40:24 UTC
queued:

commit 354ff96772540d2e836194bf14dd9c05c274055c
Author: Zhao Yakui <yakui.zhao@intel.com>
Date:   Wed Jul 8 14:13:12 2009 +0800

    drm/i915: Restore the KMS modeset for every activated CRTC


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