Bug 35614 - [SNB] random hang on piglit case shaders/glsl-max-varyings
Summary: [SNB] random hang on piglit case shaders/glsl-max-varyings
Alias: None
Product: Mesa
Classification: Unclassified
Component: Drivers/DRI/i965 (show other bugs)
Version: git
Hardware: All Linux (All)
: high major
Assignee: Ian Romanick
QA Contact:
Depends on:
Reported: 2011-03-23 22:46 UTC by fangxun
Modified: 2011-05-05 03:54 UTC (History)
0 users

See Also:
i915 platform:
i915 features:

xorg log (22.52 KB, text/plain)
2011-03-23 22:47 UTC, fangxun
i915_error_state (282.50 KB, text/plain)
2011-03-23 22:57 UTC, fangxun

Description fangxun 2011-03-23 22:46:33 UTC
System Environment:
Arch:           i386
Platform:       Huronriver
Libdrm:         (master)2.4.24-7-gfd3ed34a2070fca3804baf54ece40d0bc2666226
Mesa:           (master)e4b040c2b922ff1887651cbf658b06b48b5992c5
Xf86_video_intel: (master)2.14.901-4-gee740778f5d5355c04f6fc4564f598993b106d62
Kernel: (drm-intel-next)47ae63e0c2e5fdb582d471dc906eb29be94c732f

Bug detailed description:
Piglit case shaders/glsl-max-varyings causes GPU random hang on Huronriver.
Errors in dmesg shows:[drm:i915_hangcheck_elapsed] *ERROR* Hangcheck timer elapsed... GPU hung.
This issue doesn't happen on sugurbay.

Reproduce steps:
1. xinit& 
2. glsl-max-varyings -auto
Comment 1 fangxun 2011-03-23 22:47:27 UTC
Created attachment 44775 [details]
xorg log
Comment 2 fangxun 2011-03-23 22:57:26 UTC
Created attachment 44776 [details]
Comment 3 fangxun 2011-03-28 19:51:47 UTC
It also happens on sugarbay with latest commit:
Libdrm:         (master)2.4.24-7-gfd3ed34a2070fca3804baf54ece40d0bc2666226
Mesa:           (7.10)1efb7428ede38146e02dbaf16b8b71ed27b4cf00
Xserver:        (master)xorg-server-1.10.0
Xf86_video_intel: (master)2.14.901-7-g86f23f21ab57fcbc031bcd2b8f432a08ff4cc320
Kernel: (drm-intel-backport)c94249d2a6911daf74f329e05c42e076af2cd024
Comment 4 Eric Anholt 2011-03-29 16:42:55 UTC
Instead of saying "huronriver" or "sugarbay", which don't mean anything to us, please say "GT1" or "GT2" if it's some difference within Sandybridge, or even more specifically the pci id if it's an issue within GT1 or GT2.
Comment 5 Eric Anholt 2011-05-01 20:17:32 UTC
commit 484b51d484e52836bd2d2ded64626342203df0d3
Author: Eric Anholt <eric@anholt.net>
Date:   Fri Apr 29 15:59:30 2011 -0700

    i965/gen6: Align interleaved URB writes for overflow outputs as well.
    Fixes glsl-max-varyings.
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35614
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Comment 6 fangxun 2011-05-05 03:54:29 UTC
Verified with mesa master fc30910c65e7ab078b900c29d2066e45d3edd8c2.

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