Bug 37841 - Display distortion with powerprofile mid or low
Summary: Display distortion with powerprofile mid or low
Status: RESOLVED MOVED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Radeon (show other bugs)
Version: XOrg git
Hardware: x86-64 (AMD64) Linux (All)
: medium major
Assignee: Default DRI bug account
QA Contact:
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2011-06-01 21:49 UTC by bugreport
Modified: 2019-11-19 08:19 UTC (History)
0 users

See Also:
i915 platform:
i915 features:


Attachments
Logfile of Xorg (39.26 KB, text/plain)
2011-06-01 21:52 UTC, bugreport
no flags Details
Output of dmesg (63.31 KB, text/plain)
2011-06-01 21:55 UTC, bugreport
no flags Details

Description bugreport 2011-06-01 21:49:38 UTC
Overview:
The display is distorted when power-profile low or mid is activated.

Steps to reproduce:
echo low > /sys/class/drm/card0/device/power_profile
or
echo mid > /sys/class/drm/card0/device/power_profile

Actual Results:
The display is distorted, but the system is still usable. The distortion
consists of noisy flickering vertical stripes, with columns between them
that look ok. When I choose powerprofile default or auto or high the
distortion goes away and everything's as before.

Output of
cat /sys/kernel/debug/dri/{0,64}/radeon_pm_info:

With powerprofile default:
default engine clock: 500000 kHz
current engine clock: 499500 kHz
default memory clock: 600000 kHz
current memory clock: 594000 kHz
voltage: 1000 mV
PCIE lanes: 16
default engine clock: 500000 kHz
current engine clock: 499500 kHz
default memory clock: 600000 kHz
current memory clock: 594000 kHz
voltage: 1000 mV
PCIE lanes: 16

With powerprofile mid:
default engine clock: 500000 kHz
current engine clock: 124870 kHz
default memory clock: 600000 kHz
current memory clock: 405000 kHz
voltage: 900 mV
PCIE lanes: 16
default engine clock: 500000 kHz
current engine clock: 124870 kHz
default memory clock: 600000 kHz
current memory clock: 405000 kHz
voltage: 900 mV
PCIE lanes: 16

With powerprofile low:
default engine clock: 500000 kHz
current engine clock: 124870 kHz
default memory clock: 600000 kHz
current memory clock: 405000 kHz
voltage: 900 mV
PCIE lanes: 16
default engine clock: 500000 kHz
current engine clock: 124870 kHz
default memory clock: 600000 kHz
current memory clock: 405000 kHz
voltage: 900 mV
PCIE lanes: 16

With powerprofile high:
default engine clock: 500000 kHz
current engine clock: 499500 kHz
default memory clock: 600000 kHz
current memory clock: 594000 kHz
voltage: 1000 mV
PCIE lanes: 16
default engine clock: 500000 kHz
current engine clock: 499500 kHz
default memory clock: 600000 kHz
current memory clock: 594000 kHz
voltage: 1000 mV
PCIE lanes: 16


Expected Results:
No display distortion and perhaps other values in radeon_pm_info (values of
mid and low profile should differ and perhaps there should have been some
lanes deactivated by these profiles).
Btw. there is no such problem when I use the powermanagement-features in
xorg.conf (ForceLowPowerMode, ClockGating, DynamicPM) without KMS enabled.

Versions:
See attached logfiles.
Bug exists since power-profiles had been introduced (in kernel 2.6.34 or
2.6.35).
Comment 1 bugreport 2011-06-01 21:52:14 UTC
Created attachment 47447 [details]
Logfile of Xorg

Also attached Xorg.0.log.
Comment 2 bugreport 2011-06-01 21:55:17 UTC
Created attachment 47448 [details]
Output of dmesg

Also attached output of dmesg.
Comment 3 Martin Peres 2019-11-19 08:19:21 UTC
-- GitLab Migration Automatic Message --

This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity.

You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/drm/amd/issues/193.


Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.