http://dt.igk.intel.com/wa_database/DetailsView/Show?wa_name_id=1232
Already upstream in HSW, VLV and IVB: + /* This is required by WaCatErrorRejectionIssue */ + I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG, + I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) | + GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
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