System Environment: -------------------------- Arch: i386 Platform: Sandybridge Libdrm: (master)libdrm-2.4.35-12-gae137f4669ccdbc615d18facebdb804a9af9846b Mesa: (master)37d699a296ac1d63b9276224847df4b645b53fe2 Xserver: (master)xorg-server-1.12.0-239-g3ef3ce069d52dcfa932c90ccd30854a8d9daa15a Xf86_video_intel:(master)2.19.0-334-gfa10005ce31483827547b7f71eae066899f0026c Libva: (staging)f12f80371fb534e6bbf248586b3c17c298a31f4e Libva_intel_driver:(staging)82fa52510a37ab645daaa3bb7091ff5096a20d0b Kernel: (drm-intel-next-queued) ff049b6ce21d2814451afd4a116d001712e0116b Bug detailed description: ----------------------------- It fails 3 times in 10 runs on Sandybridge with drm-intel-next-queued kernel.It doesn't happen on drm-intel-fixes kernel. output: Probe at (30,30) Expected: 0.000000 1.000000 0.000000 Observed: 1.000000 0.000000 0.000000 PIGLIT: {'result': 'fail' } Reproduce steps: ---------------------------- 1. start X 2. ./bin/clear-varray-2.0 -auto
I've bisected the glean regress (bug #51429= to commit cc889e0f6ce6a63c62db17d702ecfed86d58083f Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Wed Jun 13 20:45:19 2012 +0200 drm/i915: disable flushing_list/gpu_write_list Can you please check whether this is the root-cause behind this issue here, too? Easiest is probably to just revert cc889e0f6ce6a63c6
Created attachment 63483 [details] [review] add CS_STALL to render cache flush Separately from testing the revert, please also test this patch here.
Add CS_STALL patch, this issue still exists. Revert commit cc889e0f6ce6, this issue goes away.
Retest this on the queued kernel (commit:3e52259264832dc8c) with SC_STALL patch. Issue goes away.
Patch merged to -queued as commit 97f209bcfc0c5db08d9badf8cbafd489f22a6e44 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu Jun 28 09:48:42 2012 +0200 drm/i915: "Flush Me Harder" required on gen6+
Verified.It has been fixed on drm-intel-next-queued kernel(commit 146937e5828ede495e11ba3a6f4a01b36b7166dc)
Closing old verified.
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