Bug 67122 - [ivb regression] "[drm:__gen6_gt_force_wake_mt_get] *ERROR* Timed out waiting for forcewake old ack to clear." is back on boot
Summary: [ivb regression] "[drm:__gen6_gt_force_wake_mt_get] *ERROR* Timed out waiting...
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: unspecified
Hardware: Other All
: medium normal
Assignee: Daniel Vetter
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2013-07-20 16:14 UTC by Chris Wilson
Modified: 2017-07-24 22:57 UTC (History)
0 users

See Also:
i915 platform:
i915 features:

Attachments
Clear forcewake before use (2.33 KB, patch)
2013-07-20 16:22 UTC, Chris Wilson 		no flags Details | Splinter Review
fix up gt init sequence ordering (4.12 KB, patch)
2013-07-21 11:15 UTC, Daniel Vetter 		no flags Details | Splinter Review
View All

Description Chris Wilson 2013-07-20 16:14:03 UTC 
Fallout from

commit 7dcd2677ea912573d9ed4bcd629b0023b2d11505
Author: Konstantin Khlebnikov <khlebnikov@openvz.org>
Date:   Wed Jul 17 10:22:58 2013 +0400

    drm/i915: fix long-standing SNB regression in power consumption after resume
Comment 1 Chris Wilson 2013-07-20 16:22:31 UTC 
Created attachment 82733 [details] [review]
Clear forcewake before use
Comment 2 Daniel Vetter 2013-07-21 10:55:22 UTC 
Oops. Can you please rebase on top of -fixes, add all the relevant cc's and submit the patch to intel-gfx? I'd like to send my -fixes pile to Dave early next week.

Looking at it a bit more I think on -fixes we only need


diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 5c0663f..ed32c43 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1593,8 +1593,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
        intel_detect_pch(dev);
 
        intel_irq_init(dev);
-       intel_gt_init(dev);
        intel_gt_reset(dev);
+       intel_gt_init(dev);
 
        /* Try to make sure MCHBAR is enabled before poking at it */
        intel_setup_mchbar(dev);

Since that reordering seems to have been an unintentional part of the offending patch.
Comment 3 Chris Wilson 2013-07-21 11:03:38 UTC 
Hmm, I thought it was intentional, but reset() doesn't look like it needs init(). Ugh, I'm really disliking this ordering and naming, which is why I felt like adding it to early_sanitize was a good step forward. I think I would like to move the write(RC6_CTL, 0); there as well for clarity.

It's your patch now. :)
Comment 4 Daniel Vetter 2013-07-21 11:15:45 UTC 
Created attachment 82772 [details] [review]
fix up gt init sequence ordering
Comment 5 Chris Wilson 2013-07-27 20:41:09 UTC 
commit 181d1b9e31c668259d3798c521672afb8edd355c
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Sun Jul 21 13:16:24 2013 +0200

    drm/i915: fix up gt init sequence fallout

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