The Linux kernel has a quirk for the Intel PCI-PCI bridges in the chipsets which
report as normal bridges but in fact are subtractive / transparent bridges..
X.org messes up some memory decision because it doesn't know this.
Created attachment 5478 [details] [review]
patch to fix Intel bridges
This patch detects the PCI bridges concerened, it also removes the BIOS range
from the sys reserved ranges, as Linux doesn't report this, in fact it should
really use the E820 table to figure it out, or better yet X shouldn't do any of
this on Linux...
talked on IRC to Egbert, checked into HEAD.
Ajax you might want to consider this for 7.1, the top bit at least, for
Patch looks OK.
I'm not particularly fond of having to blacklist things in the code but the
broken HW is to blame here.
The BIOS range seems to be a legacy from some old HW. I don't have a strong
opinion on this.
*** Bug 5443 has been marked as a duplicate of this bug. ***
Would this affect me? I have an intel bridge but I don't understand what the
pci_device&0xff00==0x2400 test does:
0000:00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev c2) (prog-if
00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR+ FastB2B-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort-
<MAbort- >SERR- <PERR-
Bus: primary=00, secondary=02, subordinate=02, sec-latency=64
I/O behind bridge: 0000c000-0000dfff
Memory behind bridge: efe00000-f7efffff
Prefetchable memory behind bridge: e7b00000-efbfffff
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
top bit definitely looks good for 7.1.
would like a stronger vote either way on the bios range tweak.
i lie. applied to 7.1 branch, thanks!