Bug 74955 - [HSW Regression]boot system has <3>[ 1.627079] [drm:intel_pipe_config_compare] *ERROR* mismatch in port_clock (expected 146250, found 270000)
Summary: [HSW Regression]boot system has <3>[ 1.627079] [drm:intel_pipe_config_comp...
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: unspecified
Hardware: All Linux (All)
: high major
Assignee: Ville Syrjala
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
: 75078 (view as bug list)
Depends on:
Blocks:
 
Reported: 2014-02-14 02:37 UTC by lu hua
Modified: 2017-10-06 14:40 UTC (History)
4 users (show)

See Also:
i915 platform:
i915 features:

Attachments
dmesg (98.31 KB, text/plain)
2014-02-14 02:37 UTC, lu hua 		no flags Details
drm/i915: Fix DDI port_clock for VGA output (1.45 KB, patch)
2014-02-14 09:09 UTC, Ville Syrjala 		no flags Details | Splinter Review
View All

Description lu hua 2014-02-14 02:37:35 UTC 
Created attachment 94037 [details]
dmesg

System Environment:
--------------------------
Platform: Haswell
Kernel: (drm-intel-nightly)2f589112609b0a964b3d78c99c0f3a83ac16add6

Bug detailed description:
-----------------------------
Clean boot system, reports <3>[    1.627079] [drm:intel_pipe_config_compare] *ERROR* mismatch in port_clock (expected 146250, found 270000).
It happens on Haswell with -queued and -nightly kernel. It doesn't happen on -fixes kernel.

The latest known good commit:3803887e245444aa465d9f3d5a4de6679e21ea45
The latest known bad commit: b6ae3c7c60161a9b1e15b1ccd6412fad65b7d9cf

Reproduce steps:
----------------------------
1. Clean boot system
2. dmesg -r | egrep "<[1-3]>" |grep drm
Comment 1 Daniel Vetter 2014-02-14 08:07:00 UTC 
Hm, regression in -nightly which works in -fixes. Can you please bisect the issue?
Comment 2 Ville Syrjala 2014-02-14 08:23:03 UTC 
(In reply to comment #1)
> Hm, regression in -nightly which works in -fixes. Can you please bisect the
> issue?

We don't have HSW clock readout in -fixes which explains this and makes bisection pointless.
Comment 3 Ville Syrjala 2014-02-14 09:09:06 UTC 
Created attachment 94052 [details] [review]
drm/i915: Fix DDI port_clock for VGA output

I think this patch should fix it. Please give it a try.
Comment 4 lu hua 2014-02-17 06:30:47 UTC 
(In reply to comment #3)
> Created attachment 94052 [details] [review] [review]
> drm/i915: Fix DDI port_clock for VGA output
> 
> I think this patch should fix it. Please give it a try.

Fixed by this patch.
Comment 5 Paulo Zanoni 2014-02-17 18:07:51 UTC 
*** Bug 75078 has been marked as a duplicate of this bug. ***
Comment 6 Ville Syrjala 2014-05-04 12:38:46 UTC 
Fixed by

commit 8f7abfd82246a8d8b5bd1ad3056f3b46345b6b4a
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Thu Feb 27 14:23:12 2014 +0200

    drm/i915: Fix DDI port_clock for VGA output
    
    On DDI there's no PLL as such to generate the pixel clock for VGA.
    Instead we derive the pixel clock from the FDI link frequency. So
    to make .compute_config match what .get_config does, we need to
    set the port_clock based on the FDI link frequency.
    
    Note that we don't even check the port_clock when selecting the
    PLL for VGA output. We just assume SPLL at 1.35GHz is what we want,
    and that does match with the asumption of FDI frequency of 2.7Ghz
    we have in intel_fdi_link_freq().
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74955
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Comment 7 lu hua 2014-05-06 05:28:19 UTC 
Verified.Fixed.
Comment 8 Elizabeth 2017-10-06 14:40:04 UTC 
Closing old verified.

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