echo "mov (8) g1<1>.x g2<4,4,1>.y { align16 };" | ./intel-gen4asm - | ./intel-gen4disasm - | ./intel-gen4asm - error: write mask set in align1 instruction Setting a break point on set_instruction_options and add_option shows that the options haven't even been parsed when set_instruction_options() is called. Can't even assemble this, which is straight out of the PRM dp4 (8) r5.0<1>.z:F r2.0<4;4,1>:F r4.0<4;4,1>:F { align16 }; 1: syntax error at ".z"
Addina Haihao and Damien as our residential assembler people. Matt, do you have a specific use-case (in mesa or somewhere) which would make fixing this useful?
I was attempting to assemble some code so substitute into Mesa in place of our generated code to see if it was worth optimizing.
Created attachment 96342 [details] [review] patch to switch swizzzle and regtype to fix echo "mov (8) g1<1>.x g2<4,4,1>.y { align16 };" | ./intel-gen4asm - | ./intel-gen4disasm - | ./intel-gen4asm -
Created attachment 96343 [details] [review] distinguish channel .z from condition .z scratch path to fix dp4 (8) r5.0<1>.z:F r2.0<4;4,1>:F r4.0<4;4,1>:F { align16 };
Both patches look good to me. Thanks Haihao! Tested-by: Matt Turner <mattst88@gmail.com>
Pushed, thanks for the report, patches and testing.
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