Bug 76345 - [BDW regression] X fails to start, when PSR enabled
Summary: [BDW regression] X fails to start, when PSR enabled
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: unspecified
Hardware: x86 (IA32) Linux (All)
: highest normal
Assignee: Rodrigo Vivi
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2014-03-19 06:30 UTC by wendy.wang
Modified: 2016-10-12 12:06 UTC (History)
3 users (show)

See Also:
i915 platform:
i915 features:


Attachments
Xorg log (19.80 KB, text/plain)
2014-03-20 03:27 UTC, wendy.wang
no flags Details
dmesg log file (96.48 KB, text/plain)
2014-03-20 03:35 UTC, wendy.wang
no flags Details

Description wendy.wang 2014-03-19 06:30:46 UTC
By kernel default setting, PSR feature is false, we need insert "i915.enable_psr=1" parameter in kernel to enable the PSR in kernel, after reboot, run xinit &, x fail to start.

this issue happened from 2014_03_07 nightly branch to the latest nightly branch, before that no such issue.

Do bisect find  drm-intel-fixes branch, 24bd9bf54d45d28089251cdf62bf14323d1aa827 is the first bad commit, revert this commit, issue disappeared.

This issue found on BDW platform, did not reproduce on HSW platform.

commit 24bd9bf54d45d28089251cdf62bf14323d1aa827
Author: Ben Widawsky <benjamin.widawsky@intel.com>
Date:   Tue Mar 4 22:38:10 2014 -0800

    drm/i915: Fix PSR programming

    | has a higher precedence than ?. Therefore, the calculation doesn't do
    at all what you would expect. Thanks to Ken for convincing me that this
    was indeed the issue. Send me back to C programmer school, please.

    I'm sort of surprised PSR was continuing to work for people. It should
    be broken IMO (and it was broken for me, but I had assumed it never
    worked).

    Regression from:
    commit ed8546ac1f99b850879f07b1e9b06b42fb0a36d9
    Author: Ben Widawsky <benjamin.widawsky@intel.com>
    Date:   Mon Nov 4 22:45:05 2013 -0800

        drm/i915/bdw: Support eDP PSR

    Cc: Rodrigo Vivi <rodrigo.vivi@gmail.com>
    Cc: Kenneth Graunke <kenneth.w.graunke@intel.com>
    Cc: Art Runyan <arthur.j.runyan@intel.com>
    Reported-by: "Kumar, Kiran S" <kiran.s.kumar@intel.com>
    Cc: stable@vger.kernel.org [v3.13+]
    Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
    Signed-off-by: Jani Nikula <jani.nikula@intel.com>

:040000 040000 af3b065bcd133817f46c1c1e6328db8cc1767095 c7b6f61027f166bb5a712201a2bd2d3997adac6e M      drivers
Comment 1 wendy.wang 2014-03-19 07:36:41 UTC
on failed kernel, if disable psr feature via "i915.enable_psr=0" parameter, x can start successfully.
Comment 2 Jani Nikula 2014-03-19 13:14:05 UTC
This is surprising. Assigning to Rodrigo.

Anything special in the logs?
Comment 3 Ben Widawsky 2014-03-19 17:06:17 UTC
Wendy, can you please attach Xorg logs and dmesg with drm.debug=0x6?
Comment 4 Ben Widawsky 2014-03-19 17:21:45 UTC
Also FWIW, I can't reproduce this locally.
Comment 5 wendy.wang 2014-03-20 03:27:34 UTC
Created attachment 96080 [details]
Xorg log

Attached Xorg.o.log and dmesg log file.
Comment 6 wendy.wang 2014-03-20 03:35:33 UTC
Created attachment 96081 [details]
dmesg log file
Comment 7 wendy.wang 2014-03-20 04:13:47 UTC
Issue cannot reproduce on another more re-worked BDW system(Rework ID: R09,R11,R12,F29, R14,R15), so this is should be single old non-worked BDW board failure, so can close this issue as not kernel code bug.

I checked tested two BDW system difference as below:

The good system CPU is x-bdw05 with GT2
x-bdw05 : stepping 3(BIOS stepping D) (id=0x1606 (rev 06)), Lynx Point 01 (B0 stepping) and Host bridge id=0x1604 (rev 06) 2Cores/4Thread, CPU Genuine Intel(R) CPU 0000 @ 1.80GHz, GT2 200MHz; BIOS version: V67.R01; KSC version: V1.16; BDW_ULT_PremiumBDW U_Preprod_acm2661_VME_1.5MB_Unified_BIOS-67.1_ME-10.0.20.1198(Spi Full) 


The fail system CPU is x-bdw04 with GT1
x-bdw04: stepping 3 (BIOS stepping D)(id=0x1606 (rev 06)), Lynx Point 02 (B0 stepping) and Host bridge id=0x1604 (rev 06) 2Cores/4Thread, CPU Genuine Intel(R) CPU 0000 @ 1.60GHz, GT1 100MHz; BIOS version: V67.R01; KSC version: V1.13; 
BDW_ULT_PremiumBDW U_Preprod_acm2661_VME_1.5MB_Unified_BIOS-67.1_ME-10.0.20.1198(Spi Full)
Comment 8 Rodrigo Vivi 2014-03-25 20:22:47 UTC
Hi Wendy, could you please test if you can reproduce a similar issue on this machine with this branch: http://cgit.freedesktop.org/~vivijim/drm-intel/log/?h=psr-baytrail

Thanks
Comment 9 wendy.wang 2014-03-26 08:03:17 UTC
Hi Rodrigo,
I verified your branch kernel:  http://cgit.freedesktop.org/~vivijim/drm-intel/log/?h=psr-baytrail, on my broken BDW SUT, cannot produce this issue, thanks.

Used kernel detail info: 
[root@x-bdw04 ~]# cat /proc/cmdline
BOOT_IMAGE=kernels//prts/d85f8b99bf0e8d218260e86de31b6b022acd4f18/bzImage_x86_64_debug root=/dev/sda4 drm.debug=0xe i915.enable_psr=1 modules_path=kernels//prts/d85f8b99bf0e8d218260e86de31b6b022acd4f18/modules_x86_64_debug/lib/modules/3.14.0-rc7_prts_d85f8b_20140326_debug acpi_rsdp=0xab7e1014 kexec_jump_back_entry=0x7a81015f
Comment 10 wendy.wang 2014-03-26 08:07:08 UTC
Hi Rodrigo,
Can you educate me why apply below patch, this issue can be fixed on my previous failed BDW SUT?

> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6f767e5..89d5b41 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1608,7 +1608,7 @@ static void intel_edp_psr_enable_source(struct intel_dp *intel_dp)
>  	struct drm_device *dev = intel_dp_to_dev(intel_dp);
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	uint32_t max_sleep_time = 0x1f;
> -	uint32_t idle_frames = 1;
> +	uint32_t idle_frames = 0xf;
>  	uint32_t val = 0x0;
>  	const uint32_t link_entry_time = EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
>  
> --
> 1.9.1
>
Comment 11 Daniel Vetter 2014-03-26 18:27:49 UTC
Wendy please don't just close a bug. Bugs should only be closed once a fix has landed in one of the usptream git repositories. Assigning back to Rodrigo.
Comment 12 Ben Widawsky 2014-05-28 19:05:32 UTC
Wendy do you still have any issue here? AFAIK, you have the one platform that failed.
Comment 13 Ben Widawsky 2014-06-04 21:23:39 UTC
This is not a regression, it's simple a bug with a specific panel when we enabled the PSR functionality. Lowering the importance, and renaming.
Comment 14 wendy.wang 2014-06-10 06:02:24 UTC
(In reply to comment #12)
> Wendy do you still have any issue here? AFAIK, you have the one platform
> that failed.

The failed platform still can reproduce this issue, used kernel is:
Linux x-bdw01 3.15.0-rc8_drm-intel-nightly_969b3c_20140610+ #3410 SMP Tue Jun 10 11:24:32 CST 2014 x86_64 x86_64 x86_64 GNU/Linux
Comment 15 wendy.wang 2014-06-10 06:06:30 UTC
(In reply to comment #13)
> This is not a regression, it's simple a bug with a specific panel when we
> enabled the PSR functionality. Lowering the importance, and renaming.

Yes, this is the single unit failure.
Comment 16 Rodrigo Vivi 2014-06-10 14:11:47 UTC
The issue remain as expect... 
Patches that fix that are still on review cycle :(
Comment 17 Daniel Vetter 2014-06-18 10:22:28 UTC
If features we have currently disabled cause issues when enabled, then this must be tracked as a regression.

That includes our entire driver btw, e.g. when vesa works but i915 doesn't load properly.
Comment 18 Rodrigo Vivi 2014-06-19 03:49:54 UTC
There are a rework with proper frontbuffer tracking landing, but I believe that the stuff that landed already fixed this bug already.

So, please verify if the issue is already fixed on -nightly
Comment 19 Chris Wilson 2014-06-19 05:20:14 UTC
Then disable acceleration to simulate handling a GPU hang, and see that it is not.
Comment 20 Chris Wilson 2014-06-21 15:11:52 UTC
Accurate frontbuffer render tracking should be upstream now, ready for testing.
Comment 21 liulei 2014-06-24 08:16:55 UTC
I retest. It works well on latest -nightly
Comment 22 Jari Tahvanainen 2016-10-12 12:06:37 UTC
Closing verified+fixed.


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