Bug 76711 - [BDW Regression] blank screen on eDP with 38aecea0
Summary: [BDW Regression] blank screen on eDP with 38aecea0
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: DRI git
Hardware: x86-64 (AMD64) Linux (All)
: high critical
Assignee: Jani Nikula
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
: 77036 (view as bug list)
Depends on:
Blocks:
 
Reported: 2014-03-27 23:28 UTC by Jordan Justen
Modified: 2017-09-04 10:17 UTC (History)
12 users (show)

See Also:
i915 platform:
i915 features:


Attachments
38aecea0~ + modprobe.blacklist=i915 (13.64 KB, text/plain)
2014-03-27 23:28 UTC, Jordan Justen
no flags Details
bwidawsk/broadwell (13.63 KB, text/plain)
2014-03-27 23:31 UTC, Jordan Justen
no flags Details
38aecea0~ (13.64 KB, text/plain)
2014-03-27 23:31 UTC, Jordan Justen
no flags Details
dmesg with drm.debug=0xe (80.40 KB, text/plain)
2014-04-01 18:17 UTC, Jordan Justen
no flags Details
dmesg after revert 38aecea (74.38 KB, text/plain)
2014-04-09 08:15 UTC, Guo Jinxian
no flags Details
[PATCH 1/2] drm/i915: clean up VBT eDP link param decoding (2.98 KB, patch)
2014-04-22 17:20 UTC, Jani Nikula
no flags Details | Splinter Review
[PATCH 2/2] drm/i915: use lane count and link rate from VBT as minimums for eDP (3.05 KB, patch)
2014-04-22 17:20 UTC, Jani Nikula
no flags Details | Splinter Review
dmesg (82.03 KB, text/plain)
2014-04-23 03:21 UTC, Guo Jinxian
no flags Details
dmesg (85.86 KB, text/plain)
2014-04-25 05:13 UTC, Guo Jinxian
no flags Details
i915_opregion (8.00 KB, text/plain)
2014-04-25 06:27 UTC, Guo Jinxian
no flags Details
intel_reg_dumper (75.00 KB, text/plain)
2014-04-28 08:37 UTC, Guo Jinxian
no flags Details
dmesg (139.41 KB, text/plain)
2014-05-06 21:53 UTC, Rodrigo Vivi
no flags Details
dmesg nightly with revert (147.26 KB, text/plain)
2014-05-08 00:34 UTC, Rodrigo Vivi
no flags Details
dmesg nightly with revert (146.99 KB, text/plain)
2014-05-08 00:44 UTC, Rodrigo Vivi
no flags Details
intel_reg_dumper output on branch bug76711-prefer-wide (9.51 KB, text/plain)
2014-05-09 02:53 UTC, Guo Jinxian
no flags Details
dmesg on branch bug76711-prefer-wide (100.46 KB, text/plain)
2014-05-09 02:54 UTC, Guo Jinxian
no flags Details
intel_reg_dumper output on branch bug76711-prefer-fast-and-wide (9.42 KB, text/plain)
2014-05-09 02:57 UTC, Guo Jinxian
no flags Details
dmesg on branch bug76711-prefer-fast-and-wide (89.61 KB, text/plain)
2014-05-09 02:58 UTC, Guo Jinxian
no flags Details
intel_reg_dumper output on branch bug76711-nightly (9.42 KB, text/plain)
2014-05-09 03:01 UTC, Guo Jinxian
no flags Details
dmesg on branch bug76711-nightly (84.20 KB, text/plain)
2014-05-09 03:02 UTC, Guo Jinxian
no flags Details

Description Jordan Justen 2014-03-27 23:28:52 UTC
Created attachment 96497 [details]
38aecea0~ + modprobe.blacklist=i915

38aecea0ccbb909d635619cba22f1891e589b434
causes the eDP panel on my BDW system to only
show a blank screen.

I collected intel_reg_dumper output for three cases:

not-loaded is 38aecea0~ + modprobe.blacklist=i915
fast-mode is bwidawsk/broadwell
wide-mode is 38aecea0~
Comment 1 Jordan Justen 2014-03-27 23:31:07 UTC
Created attachment 96498 [details]
bwidawsk/broadwell
Comment 2 Jordan Justen 2014-03-27 23:31:55 UTC
Created attachment 96499 [details]
38aecea0~
Comment 3 Ben Widawsky 2014-03-27 23:40:36 UTC
Note this SHA is from -nightly and the bug is not specific to my broadwell branch.
Comment 4 Jani Nikula 2014-03-28 12:25:05 UTC
commit 38aecea0ccbb909d635619cba22f1891e589b434
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Mon Mar 3 11:18:10 2014 +0100

    drm/i915: reverse dp link param selection, prefer fast over wide again

We need to dig into this, because fast over wide is what the DP specs say. We can't keep going back and forth with the decision.
Comment 5 Ben Widawsky 2014-03-31 23:41:11 UTC
Jani, all the new platforms we got seem to have this problem. Who is the right person to get one to?
Comment 6 Jani Nikula 2014-04-01 10:01:56 UTC
Jordan, please attach dmesg with drm.debug=0xe, all the way from early boot to the fail.

Ben, please see follow-up in email.
Comment 7 Jordan Justen 2014-04-01 18:17:50 UTC
Created attachment 96741 [details]
dmesg with drm.debug=0xe
Comment 8 Ben Widawsky 2014-04-04 04:07:48 UTC
*** Bug 77036 has been marked as a duplicate of this bug. ***
Comment 9 Ben Widawsky 2014-04-04 04:09:19 UTC
Jani, I guess we don't have anyone with time to look into this. Assigning you so you can be the contact. IMO, feel free to reassign to Jesse or Daniel who are also pushing to not revert.
Comment 10 Guang Yang 2014-04-04 07:04:03 UTC
On our side, only the 3200x1800 mode eDP panel can't work and shows black screen after loading the i915 dirver, but the 1920x1080 mode eDP panel can work well even on the same machine with  HSW/BYT/BDW,
Comment 11 Ben Widawsky 2014-04-04 22:28:49 UTC
Yang Guang, can you please try to revert 38aecea0ccbb909d635619cba22f1891e589b434 and see if 32x18 works?
Comment 12 Guo Jinxian 2014-04-09 08:15:01 UTC
Created attachment 97114 [details]
dmesg after revert 38aecea

Reverted 38aecea0ccbb909d635619cba22f1891e589b434, 3200x1800 works well. thanks.
Comment 13 Daniel Vetter 2014-04-22 15:57:34 UTC
Hm I was mistaken, we already have a dupe of this for hsw: fdo bug #73539
Comment 14 Jani Nikula 2014-04-22 17:20:04 UTC
Created attachment 97762 [details] [review]
[PATCH 1/2] drm/i915: clean up VBT eDP link param decoding
Comment 15 Jani Nikula 2014-04-22 17:20:56 UTC
Created attachment 97763 [details] [review]
[PATCH 2/2] drm/i915: use lane count and link rate from VBT as minimums for eDP

Please try these two patches and report back.
Comment 16 Guo Jinxian 2014-04-23 03:21:46 UTC
Created attachment 97795 [details]
dmesg

Tested on latest -next-queued(f68918de204f124b33e0fcf0777c47ca793f60e1) with the patches. 3200X1800 eDP still unable to display.
Comment 17 Jani Nikula 2014-04-23 06:45:50 UTC
(In reply to comment #16)
> Created attachment 97795 [details]
> dmesg
> 
> Tested on latest -next-queued(f68918de204f124b33e0fcf0777c47ca793f60e1) with
> the patches. 3200X1800 eDP still unable to display.

Please attach /sys/kernel/debug/dri/0/i915_opregion from that machine.

Please grab drm-intel-nightly, revert 38aecea0ccbb909d635619cba22f1891e589b434, and provide dmesg for that.
Comment 18 Paulo Zanoni 2014-04-24 14:44:03 UTC
(In reply to comment #12)
> Created attachment 97114 [details]
> dmesg after revert 38aecea
> 
> Reverted 38aecea0ccbb909d635619cba22f1891e589b434, 3200x1800 works well.
> thanks.

This dmesg is broken: there is no drm.debug=0xe, and there are a lot of WARNs. Please collect it again.
Comment 19 Paulo Zanoni 2014-04-24 14:47:04 UTC
Also please notice that we're failing at 5 GHz here.
Comment 20 Paulo Zanoni 2014-04-24 17:08:36 UTC
(In reply to comment #0)
> Created attachment 96497 [details]
> 38aecea0~ + modprobe.blacklist=i915
> 
> 38aecea0ccbb909d635619cba22f1891e589b434
> causes the eDP panel on my BDW system to only
> show a blank screen.
> 
> I collected intel_reg_dumper output for three cases:
> 
> not-loaded is 38aecea0~ + modprobe.blacklist=i915
> fast-mode is bwidawsk/broadwell
> wide-mode is 38aecea0~

These dumps were taken with a too-old IGT version.

Can you please reproduce the bug, then take them again? Please make sure that your IGT contains the following commit: http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/commit/?id=574d62db398af45a8cb1d38fd77dd50bd645149b

Thanks,
Paulo
Comment 21 Guo Jinxian 2014-04-25 05:13:15 UTC
Created attachment 97934 [details]
dmesg

On latest -nightly(7fa20daad840000b56924136d02a8d33265f29ca) reverted (38aecea0ccbb909d635619cba22f1891e589b434), then patched [PATCH 1/2] drm/i915: clean up VBT eDP link param decoding and [PATCH 2/2] drm/i915: use lane count and link rate from VBT as minimums for eDP, 3200x1800 eDP still shows blackscreen. Please check the dmesg with "drm.debug=0xe". Thanks.

[root@x-bdw07 tests]# xrandr
Screen 0: minimum 8 x 8, current 3200 x 1800, maximum 32767 x 32767
eDP1 connected 3200x1800+0+0 (normal left inverted right x axis y axis) 293mm x 165mm
   3200x1800     60.00*+  51.60
   2048x1536     60.00
   1920x1440     60.00
   1856x1392     60.01
   1792x1344     60.01
   1600x1200     60.00
   1400x1050     59.98
   1280x1024     60.02
   1280x960      60.00
   1024x768      60.00
   800x600       60.32    56.25
   640x480       59.94
DP1 disconnected (normal left inverted right x axis y axis)
HDMI1 disconnected (normal left inverted right x axis y axis)
HDMI2 disconnected (normal left inverted right x axis y axis)
VIRTUAL1 disconnected (normal left inverted right x axis y axis)
Comment 22 Guo Jinxian 2014-04-25 05:18:58 UTC
(In reply to comment #17)
> (In reply to comment #16)
> > Created attachment 97795 [details]
> > dmesg
> > 
> > Tested on latest -next-queued(f68918de204f124b33e0fcf0777c47ca793f60e1) with
> > the patches. 3200X1800 eDP still unable to display.
> 
> Please attach /sys/kernel/debug/dri/0/i915_opregion from that machine.
> 
> Please grab drm-intel-nightly, revert
> 38aecea0ccbb909d635619cba22f1891e589b434, and provide dmesg for that.

The size of /sys/kernel/debug/dri/0/i915_opregion is 0 kb.
Comment 23 Jani Nikula 2014-04-25 05:48:18 UTC
(In reply to comment #22)
> The size of /sys/kernel/debug/dri/0/i915_opregion is 0 kb.

It's debugfs, just cp the file.
Comment 24 Guo Jinxian 2014-04-25 05:57:30 UTC
(In reply to comment #23)
> (In reply to comment #22)
> > The size of /sys/kernel/debug/dri/0/i915_opregion is 0 kb.
> 
> It's debugfs, just cp the file.

bugs.freedesktop.org doesn't support 0 kb attachment(The file you are trying to attach is empty, does not exist, or you don't have permission to read it.) I will send it to you by email later. Thanks.
Comment 25 Jani Nikula 2014-04-25 06:22:43 UTC
(In reply to comment #24)
> (In reply to comment #23)
> > (In reply to comment #22)
> > > The size of /sys/kernel/debug/dri/0/i915_opregion is 0 kb.
> > 
> > It's debugfs, just cp the file.
> 
> bugs.freedesktop.org doesn't support 0 kb attachment(The file you are trying
> to attach is empty, does not exist, or you don't have permission to read
> it.) I will send it to you by email later. Thanks.

Do not send by email. Copy the file from debugfs to somewhere, and attach from there. Its size will be 8 kB after you've copied it to a regular filesystem. Debugfs is special.
Comment 26 Guo Jinxian 2014-04-25 06:27:52 UTC
Created attachment 97936 [details]
i915_opregion
Comment 27 Guo Jinxian 2014-04-25 06:29:42 UTC
(In reply to comment #25)
> (In reply to comment #24)
> > (In reply to comment #23)
> > > (In reply to comment #22)
> > > > The size of /sys/kernel/debug/dri/0/i915_opregion is 0 kb.
> > > 
> > > It's debugfs, just cp the file.
> > 
> > bugs.freedesktop.org doesn't support 0 kb attachment(The file you are trying
> > to attach is empty, does not exist, or you don't have permission to read
> > it.) I will send it to you by email later. Thanks.
> 
> Do not send by email. Copy the file from debugfs to somewhere, and attach
> from there. Its size will be 8 kB after you've copied it to a regular
> filesystem. Debugfs is special.

Yes, Thanks for your guidance, please check i915_opregion in attachment for detail.
Comment 28 Paulo Zanoni 2014-04-25 16:15:23 UTC
(In reply to comment #21)
> Created attachment 97934 [details]
> dmesg
> 
> On latest -nightly(7fa20daad840000b56924136d02a8d33265f29ca) reverted
> (38aecea0ccbb909d635619cba22f1891e589b434), then patched [PATCH 1/2]
> drm/i915: clean up VBT eDP link param decoding and [PATCH 2/2] drm/i915: use
> lane count and link rate from VBT as minimums for eDP, 3200x1800 eDP still
> shows blackscreen. Please check the dmesg with "drm.debug=0xe". Thanks.
> 
> [root@x-bdw07 tests]# xrandr
> Screen 0: minimum 8 x 8, current 3200 x 1800, maximum 32767 x 32767
> eDP1 connected 3200x1800+0+0 (normal left inverted right x axis y axis)
> 293mm x 165mm
>    3200x1800     60.00*+  51.60
>    2048x1536     60.00
>    1920x1440     60.00
>    1856x1392     60.01
>    1792x1344     60.01
>    1600x1200     60.00
>    1400x1050     59.98
>    1280x1024     60.02
>    1280x960      60.00
>    1024x768      60.00
>    800x600       60.32    56.25
>    640x480       59.94
> DP1 disconnected (normal left inverted right x axis y axis)
> HDMI1 disconnected (normal left inverted right x axis y axis)
> HDMI2 disconnected (normal left inverted right x axis y axis)
> VIRTUAL1 disconnected (normal left inverted right x axis y axis)

Please also provide the output of intel_reg_dumper for this case.

Thanks,
Paulo
Comment 29 Guo Jinxian 2014-04-28 08:37:02 UTC
Created attachment 98112 [details]
intel_reg_dumper

Here is the file /opt/X11R7/bin/intel_reg_dumper.
Comment 30 Jani Nikula 2014-04-28 11:13:52 UTC
(In reply to comment #29)
> Created attachment 98112 [details]
> intel_reg_dumper
> 
> Here is the file /opt/X11R7/bin/intel_reg_dumper.

Paulo is requesting the *output* of that binary. Preferrably using intel_reg_dumper from a recent version of igt.
Comment 31 Guo Jinxian 2014-05-04 06:13:22 UTC
(In reply to comment #30)
> (In reply to comment #29)
> > Created attachment 98112 [details]
> > intel_reg_dumper
> > 
> > Here is the file /opt/X11R7/bin/intel_reg_dumper.
> 
> Paulo is requesting the *output* of that binary. Preferrably using
> intel_reg_dumper from a recent version of igt.

./intel_reg_dumper
             HSW_PWR_WELL_CTL1: 0x40000000
             HSW_PWR_WELL_CTL2: 0xc0000000
             HSW_PWR_WELL_CTL3: 0x40000000
             HSW_PWR_WELL_CTL4: 0x40000000
             HSW_PWR_WELL_CTL5: 0x0004050f
             HSW_PWR_WELL_CTL6: 0x00000000
           PIPE_DDI_FUNC_CTL_A: 0x00030000 (disabled, no port, HDMI, 8 bpc, +VSync, +HSync, EDP A ON, x1)
           PIPE_DDI_FUNC_CTL_B: 0x00030000 (disabled, no port, HDMI, 8 bpc, +VSync, +HSync, EDP A ON, x1)
           PIPE_DDI_FUNC_CTL_C: 0x00030000 (disabled, no port, HDMI, 8 bpc, +VSync, +HSync, EDP A ON, x1)
         PIPE_DDI_FUNC_CTL_EDP: 0x82200002 (enabled, no port, DP SST, 6 bpc, -VSync, -HSync, EDP A ON, x2)
                   DP_TP_CTL_A: 0x80040300
                   DP_TP_CTL_B: 0x00000000
                   DP_TP_CTL_C: 0x00000000
                   DP_TP_CTL_D: 0x00000000
                   DP_TP_CTL_E: 0x00000000
                DP_TP_STATUS_B: 0x00000000
                DP_TP_STATUS_C: 0x00000000
                DP_TP_STATUS_D: 0x00000000
                DP_TP_STATUS_E: 0x00000000
                 DDI_BUF_CTL_A: 0x84000013 (enabled not reversed x2 detected)
                 DDI_BUF_CTL_B: 0x00000000 (disabled not reversed x1 not detected)
                 DDI_BUF_CTL_C: 0x00000000 (disabled not reversed x1 not detected)
                 DDI_BUF_CTL_D: 0x00000000 (disabled not reversed x1 not detected)
                 DDI_BUF_CTL_E: 0x00000080 (disabled not reversed x1 not detected)
                      SPLL_CTL: 0x00000000
                     LCPLL_CTL: 0x44000000
                    WRPLL_CTL1: 0x00202418
                    WRPLL_CTL2: 0x00202418
                PORT_CLK_SEL_A: 0x00000000 (LCPLL 2700)
                PORT_CLK_SEL_B: 0xe0000000 (None)
                PORT_CLK_SEL_C: 0xe0000000 (None)
                PORT_CLK_SEL_D: 0xe0000000 (None)
                PORT_CLK_SEL_E: 0xe0000000 (None)
                PIPE_CLK_SEL_A: 0x00000000 (None)
                PIPE_CLK_SEL_B: 0x00000000 (None)
                PIPE_CLK_SEL_C: 0x00000000 (None)
                     WM_PIPE_A: 0x00300002 (primary 48, sprite 0, pipe 2)
                     WM_PIPE_B: 0x00000000 (primary 0, sprite 0, pipe 0)
                     WM_PIPE_C: 0x00000000 (primary 0, sprite 0, pipe 0)
                        WM_LP1: 0x822a3702 (enabled, latency 2, fbc 2, pri 567, cur 2)
                        WM_LP2: 0x8655be02 (enabled, latency 6, fbc 5, pri 446, cur 2)
                        WM_LP3: 0x88670a02 (enabled, latency 8, fbc 6, pri 778, cur 2)
                    WM_LP1_SPR: 0x00000000
                    WM_LP2_SPR: 0x00000000
                    WM_LP3_SPR: 0x00000000
                       WM_MISC: 0x00000000
                     WM_SR_CNT: 0x00000000
            PIPE_WM_LINETIME_A: 0x00310049
            PIPE_WM_LINETIME_B: 0x00000000
            PIPE_WM_LINETIME_C: 0x00000000
                        WM_DBG: 0x80000000
                   SFUSE_STRAP: 0x00000006 (display enabled, crt no, lane reversal no, port b yes, port c yes, port d no)
                      PIPEASRC: 0x0c7f0707 (3200, 1800)
                      DSPACNTR: 0xd9000000 (enabled)
                    DSPASTRIDE: 0x00003200 (200)
                      DSPASURF: 0x00097000
                   DSPATILEOFF: 0x00000000 (0, 0)
                      PIPEBSRC: 0x00000000 (1, 1)
                      DSPBCNTR: 0x00000000 (disabled)
                    DSPBSTRIDE: 0x00000000 (0)
                      DSPBSURF: 0x00000000
                   DSPBTILEOFF: 0x00000000 (0, 0)
                      PIPECSRC: 0x00000000 (1, 1)
                      DSPCCNTR: 0x00000000 (disabled)
                    DSPCSTRIDE: 0x00000000 (0)
                      DSPCSURF: 0x00000000
                   DSPCTILEOFF: 0x00000000 (0, 0)
                     PIPEACONF: 0x40000000 (disabled, active, pf-pd, rotate 0, 8bpc)
                      HTOTAL_A: 0x00000000 (1 active, 1 total)
                      HBLANK_A: 0x00000000 (1 start, 1 end)
                       HSYNC_A: 0x00000000 (1 start, 1 end)
                      VTOTAL_A: 0x00000000 (1 active, 1 total)
                      VBLANK_A: 0x00000000 (1 start, 1 end)
                       VSYNC_A: 0x00000000 (1 start, 1 end)
                  VSYNCSHIFT_A: 0x00000000
                 PIPEA_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
                 PIPEA_DATA_N1: 0x00000000 (val 0x0 0)
                 PIPEA_LINK_M1: 0x00000000 (val 0x0 0)
                 PIPEA_LINK_N1: 0x00000000 (val 0x0 0)
                     PIPEBCONF: 0x40000000 (disabled, active, pf-pd, rotate 0, 8bpc)
                      HTOTAL_B: 0x00000000 (1 active, 1 total)
                      HBLANK_B: 0x00000000 (1 start, 1 end)
                       HSYNC_B: 0x00000000 (1 start, 1 end)
                      VTOTAL_B: 0x00000000 (1 active, 1 total)
                      VBLANK_B: 0x00000000 (1 start, 1 end)
                       VSYNC_B: 0x00000000 (1 start, 1 end)
                  VSYNCSHIFT_B: 0x00000000
                 PIPEB_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
                 PIPEB_DATA_N1: 0x00000000 (val 0x0 0)
                 PIPEB_LINK_M1: 0x00000000 (val 0x0 0)
                 PIPEB_LINK_N1: 0x00000000 (val 0x0 0)
                     PIPECCONF: 0x40000000 (disabled, active, pf-pd, rotate 0, 8bpc)
                      HTOTAL_C: 0x00000000 (1 active, 1 total)
                      HBLANK_C: 0x00000000 (1 start, 1 end)
                       HSYNC_C: 0x00000000 (1 start, 1 end)
                      VTOTAL_C: 0x00000000 (1 active, 1 total)
                      VBLANK_C: 0x00000000 (1 start, 1 end)
                       VSYNC_C: 0x00000000 (1 start, 1 end)
                  VSYNCSHIFT_C: 0x00000000
                 PIPEC_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
                 PIPEC_DATA_N1: 0x00000000 (val 0x0 0)
                 PIPEC_LINK_M1: 0x00000000 (val 0x0 0)
                 PIPEC_LINK_N1: 0x00000000 (val 0x0 0)
                   PIPEEDPCONF: 0xc0000000 (enabled, active, pf-pd, rotate 0, 8bpc)
                    HTOTAL_EDP: 0x0cf30c7f (3200 active, 3316 total)
                    HBLANK_EDP: 0x0cf30c7f (3200 start, 3316 end)
                     HSYNC_EDP: 0x0ccf0caf (3248 start, 3280 end)
                    VTOTAL_EDP: 0x07170707 (1800 active, 1816 total)
                    VBLANK_EDP: 0x07170707 (1800 start, 1816 end)
                     VSYNC_EDP: 0x070e0709 (1802 start, 1807 end)
                VSYNCSHIFT_EDP: 0x00000000
               PIPEEDP_DATA_M1: 0x7e60596d (TU 64, val 0x60596d 6314349)
               PIPEEDP_DATA_N1: 0x00800000 (val 0x800000 8388608)
               PIPEEDP_LINK_M1: 0x000ab49a (val 0xab49a 701594)
               PIPEEDP_LINK_N1: 0x00100000 (val 0x100000 1048576)
                     PFA_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
                   PFA_WIN_POS: 0x00000000 (0, 0)
                  PFA_WIN_SIZE: 0x00000000 (0, 0)
                     PFB_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
                   PFB_WIN_POS: 0x00000000 (0, 0)
                  PFB_WIN_SIZE: 0x00000000 (0, 0)
                     PFC_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
                   PFC_WIN_POS: 0x00000000 (0, 0)
                  PFC_WIN_SIZE: 0x00000000 (0, 0)
                TRANS_HTOTAL_A: 0x00000006 (7 active, 1 total)
                TRANS_HBLANK_A: 0x00000006 (7 start, 1 end)
                 TRANS_HSYNC_A: 0x00000006 (7 start, 1 end)
                TRANS_VTOTAL_A: 0x00000006 (7 active, 1 total)
                TRANS_VBLANK_A: 0x00000006 (7 start, 1 end)
                 TRANS_VSYNC_A: 0x00000006 (7 start, 1 end)
            TRANS_VSYNCSHIFT_A: 0x00000006
                    TRANSACONF: 0x00000006 (disable, inactive, progressive)
                  FDI_RXA_MISC: 0x00000006 (FDI Delay 6)
               FDI_RXA_TUSIZE1: 0x00000006
                   FDI_RXA_IIR: 0x00000006
                   FDI_RXA_IMR: 0x00000006
              BLC_PWM_CPU_CTL2: 0x00000000 (enable 0, pipe A, blinking 0, granularity 128)
               BLC_PWM_CPU_CTL: 0x03a903a9 (cycle 937, freq 937)
             BLC_PWM2_CPU_CTL2: 0x00000000 (enable 0, pipe A, blinking 0, granularity 128)
              BLC_PWM2_CPU_CTL: 0x00000000 (cycle 0, freq 0)
                  BLC_MISC_CTL: 0x00000000 (PWM1-PCH PWM2-CPU)
              BLC_PWM_PCH_CTL1: 0xc0000000 (enable 1, override 1, inverted polarity 0)
              BLC_PWM_PCH_CTL2: 0x03a903a9 (freq 937, cycle 937)
                  UTIL_PIN_CTL: 0x00000000 (enable 0, transcoder A, mode data, data 0 inverted polarity 0)
                 PCH_PP_STATUS: 0x80000008 (on, not ready, sequencing idle)
                PCH_PP_CONTROL: 0xabcd0007 (blacklight enabled, power down on reset, panel on)
              PCH_PP_ON_DELAYS: 0x07d00001
             PCH_PP_OFF_DELAYS: 0x01f40001
                PCH_PP_DIVISOR: 0x0004af06
                   PIXCLK_GATE: 0x0004af06
                        SDEISR: 0x00800000 (port d:1, port c:0, port b:0, crt:0)
            RC6_RESIDENCY_TIME: 0x00069dd4
Comment 32 Jani Nikula 2014-05-06 08:20:38 UTC
Please try http://patchwork.freedesktop.org/patch/24813/ on top of current drm-intel-nightly, and attach dmesg.
Comment 33 Jani Nikula 2014-05-06 12:21:55 UTC
Please *also* try the below test patch on top of current drm-intel-nightly, see if it works, and attach dmesg.

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 87b0a515d7a5..67fd0ec2b34d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -814,8 +814,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
                mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
                                                   bpp);
 
-               for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
-                       for (clock = 0; clock <= max_clock; clock++) {
+               for (lane_count = max_lane_count; lane_count <= max_lane_count; lane_count <<= 1) {
+                       for (clock = max_clock; clock <= max_clock; clock++) {
                                link_clock = drm_dp_bw_code_to_link_rate(bws[clock]);
                                link_avail = intel_dp_max_data_rate(link_clock,
                                                                    lane_count);
Comment 34 Rodrigo Vivi 2014-05-06 21:50:14 UTC
-nightly that already contains that patch 24813 still doesn't work on BDW high res. Still getting the blank screen.
This extra attempt to use
link_avail = intel_dp_max_data_rate(link_clock, lane_count);
only for max lane and max clock apparently solves the blank screen because I was able to see the screen and login... than screen freezes during kdm login before I can reach the screen...

I have no idea if it is a issue caused by this workaround or another bug that was already present but masked by the blank screen one.

Anyway, attaching dmesg next...
Comment 35 Rodrigo Vivi 2014-05-06 21:51:20 UTC
Comment on attachment 97763 [details] [review]
[PATCH 2/2] drm/i915: use lane count and link rate from VBT as minimums for eDP

today's -nightly + max_lane + max_clock attempt...
Comment 36 Rodrigo Vivi 2014-05-06 21:53:02 UTC
Created attachment 98590 [details]
dmesg

ops, sorry.. this is the dmesg of today's nightly plus the max_lane max_clock attempt...
Comment 37 Jani Nikula 2014-05-07 06:44:48 UTC
(In reply to comment #36)
> Created attachment 98590 [details]
> dmesg
> 
> ops, sorry.. this is the dmesg of today's nightly plus the max_lane
> max_clock attempt...

Is there a picture on screen with this? AFAICT the failure mode is such that there are no hints in the dmesg. Link training succeeds also in the blank screen case.
Comment 38 Jani Nikula 2014-05-07 14:27:49 UTC
Rodrigo, I'd like you to check the diffences in dmesg and reg dump between nightly and nightly+max_lane/max_clock. I want to rule out the possibility 5.4 GHz is completely broken.
Comment 39 Jani Nikula 2014-05-07 14:28:40 UTC
(In reply to comment #38)
> Rodrigo, I'd like you to check the diffences in dmesg and reg dump between
> nightly and nightly+max_lane/max_clock. I want to rule out the possibility
> 5.4 GHz is completely broken.

Argh, between nightly+revert and nightly+max_lane/max_clock.
Comment 40 Rodrigo Vivi 2014-05-07 23:57:50 UTC
Hi Jani, I got the pure nightly and reverted the patch and got same result as your test, i.e., frozen screen... But actually it was a frozen machine...

So, your first guess it was probably right, but doing this we unmasked  another bug that we didn't know because we couldn't actually see the screen ;)

Well, since machine is frozen I couldn't get any log yet... I'll try to reproduce in a way that I got frozen screen without frozen machine as I got yesterday.
Comment 41 Rodrigo Vivi 2014-05-08 00:34:29 UTC
Created attachment 98651 [details]
dmesg nightly with revert

This is what I got after fronze screen
Comment 42 Rodrigo Vivi 2014-05-08 00:44:47 UTC
Created attachment 98652 [details]
dmesg nightly with revert

dmesg nightly with revert
Comment 43 Rodrigo Vivi 2014-05-08 00:58:08 UTC
Arrgh... There is something wrong and bizarre with my machine or bios here... Even with the kernel I'm sure it was working before I'm facing this strange freezings... So please just ignore my previous comments.... consider that your max_lane max_clock works....
however I'm unable to provide you the clean log for you right now... I'm going to clean it up here and start over... As soon as I can get a clean log I attach here again...
Comment 44 Jani Nikula 2014-05-08 19:12:10 UTC
Rodrigo and Guo Jinxian, I'd like you both to try three branches, and for each, provide this info:

1) does the screen work?
2) full dmesg with drm.debug=0xe
3) intel_reg_dumper output

The branches are:
http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-prefer-wide
http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-prefer-fast-and-wide
http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-nightly

Please clearly indicate the branch in each attachment.
Comment 45 Guo Jinxian 2014-05-09 02:53:45 UTC
Created attachment 98718 [details]
intel_reg_dumper output on branch bug76711-prefer-wide

On Branch http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-prefer-wide
The screen works well.
commit 1963c8b0a90e4022a8b2d06a56fae018a54598e3
please check the output of intel_reg_dumper in attachment
Comment 46 Guo Jinxian 2014-05-09 02:54:39 UTC
Created attachment 98719 [details]
dmesg on branch bug76711-prefer-wide
Comment 47 Guo Jinxian 2014-05-09 02:57:31 UTC
Created attachment 98720 [details]
intel_reg_dumper output on branch bug76711-prefer-fast-and-wide

On Branch http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-prefer-fast-and-wide
The screen works well.
commit 933bba2ab98a2f5282fa02596f253c077634662b
please check the output of intel_reg_dumper in attachment
Comment 48 Guo Jinxian 2014-05-09 02:58:25 UTC
Created attachment 98721 [details]
dmesg on branch bug76711-prefer-fast-and-wide
Comment 49 Guo Jinxian 2014-05-09 03:01:44 UTC
Created attachment 98722 [details]
intel_reg_dumper output on branch bug76711-nightly

On Branch http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-nightly

Blank secreen shows.

commit  dd28119c31cf06fc4c3bb548699018a91e45a676
please check the output of intel_reg_dumper in attachment
Comment 50 Guo Jinxian 2014-05-09 03:02:23 UTC
Created attachment 98723 [details]
dmesg on branch bug76711-nightly
Comment 51 Jani Nikula 2014-05-09 06:59:30 UTC
Looking at the results, the 4 lane configurations work, but 2 lane configurations don't. This is also true for 5.4 GHz, indicated by bug76711-prefer-fast-and-wide vs. bug76711-nightly. The dmesg and reg dump differences between the two are minimal, yet crucial. Investigation continues.
Comment 52 Jani Nikula 2014-05-12 19:14:29 UTC
(In reply to comment #44)
> Rodrigo and Guo Jinxian, I'd like you both to try three branches, and for
> each, provide this info:
> 
> 1) does the screen work?
> 2) full dmesg with drm.debug=0xe
> 3) intel_reg_dumper output
> 
> The branches are:
> http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-prefer-wide
> http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-prefer-fast-and-wide
> http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-nightly
> 
> Please clearly indicate the branch in each attachment.

I pushed three more branches to test:

http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-test1
http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-test2
http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-test3

Please try these and report back.
Comment 53 Jani Nikula 2014-05-14 09:54:46 UTC
Here's my proposed workaround for the issue:

http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-workaround

Please test that first.
Comment 54 Rodrigo Vivi 2014-05-14 17:35:07 UTC
Last proposed workaround worked fine here.
I've gave tested-by and reviewed-by on mailing list.

Do you still need tests on other branches?
Comment 55 Guo Jinxian 2014-05-15 02:34:44 UTC
(In reply to comment #53)
> Here's my proposed workaround for the issue:
> 
> http://cgit.freedesktop.org/~jani/drm/log/?h=bug76711-workaround
> 
> Please test that first.

Tested on branch bug76711-workaround(3bc2ef52d95560540415eaff7de892bb9e08dd9d), The screen work well.
Comment 56 Jani Nikula 2014-05-15 11:09:23 UTC
Fix pushed to drm-intel-fixes (and drm-intel-nightly) as

commit f4cdbc21444a45d207a8dc175f44d2facfbd0845
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Wed May 14 13:02:19 2014 +0300

    drm/i915/dp: force eDP lane count to max available lanes on BDW

Thanks for the report and testing.
Comment 57 Guo Jinxian 2014-05-16 03:55:33 UTC
(In reply to comment #56)
> Fix pushed to drm-intel-fixes (and drm-intel-nightly) as
> 
> commit f4cdbc21444a45d207a8dc175f44d2facfbd0845
> Author: Jani Nikula <jani.nikula@intel.com>
> Date:   Wed May 14 13:02:19 2014 +0300
> 
>     drm/i915/dp: force eDP lane count to max available lanes on BDW
> 
> Thanks for the report and testing.

This commit didn't included into latest -fixes(05adaf1f101f25f40f12c29403e6488f0e45f6b6) now, I will verified it later
Comment 58 Daniel Vetter 2014-05-19 09:19:24 UTC
(In reply to comment #57)
> (In reply to comment #56)
> > Fix pushed to drm-intel-fixes (and drm-intel-nightly) as
> > 
> > commit f4cdbc21444a45d207a8dc175f44d2facfbd0845
> > Author: Jani Nikula <jani.nikula@intel.com>
> > Date:   Wed May 14 13:02:19 2014 +0300
> > 
> >     drm/i915/dp: force eDP lane count to max available lanes on BDW
> > 
> > Thanks for the report and testing.
> 
> This commit didn't included into latest
> -fixes(05adaf1f101f25f40f12c29403e6488f0e45f6b6) now, I will verified it
> later

It's there now ...
Comment 59 Guo Jinxian 2014-05-23 03:40:46 UTC
Verified on latest -fixes(f93e94efebbe0b9ad5048076f171ea2b054ca4fb).
Comment 60 Jari Tahvanainen 2017-09-04 10:17:56 UTC
Closing old verified+fixed.


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