Created attachment 97654 [details] output System Environment: -------------------------- Platform: Ironlake Libdrm: (master)libdrm-2.4.53-6-gd4083dc762a2974c35ecd16be995272bbb6d57b4 Mesa: (master)ba6dcb3c2b8f516b120f591144bf6c3751f0e3f9 Xserver: (master)xorg-server-1.15.99.902-20-gc7011249d2abe6cc7af82ee4b79d8f6873444707 Xf86_video_intel:(master)2.99.911-89-g08e71e1820d6fcb6829b4ebd360beadc1f250295 Libva: (staging)5e10a246287fa2dd3fae2bf756a5b33087cc097c Libva_intel_driver:(staging)782b8afdda14f000874d8acf51c3e8c490d55773 Kernel: (drm-intel-nightly)1e771b84e47085ef9b6efea1321e7cb5a8b2c06 Bug detailed description: ----------------------------- It fails on Ironlake platforms with mesa master branch, and works well on 10.1 branch. Bisect shows: 2dfbbeca50b95ccdd714d9baa4411c779f6a20d9 is the first bad commit. commit 2dfbbeca50b95ccdd714d9baa4411c779f6a20d9 Author: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> AuthorDate: Fri Mar 28 15:28:31 2014 +0200 Commit: Matt Turner <mattst88@gmail.com> CommitDate: Wed Apr 16 22:46:45 2014 -0700 i965/vec4: Change vec4_visitor::emit_lrp to use MAC for gen<6 This allows us to emit ADD/MUL/MAC instead of MUL/ADD/MUL/ADD, saving one instruction and two temporary registers. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reproduce steps: ---------------------------- 1. xinit 2. ./bin/glean -o -v -v -v -t +texCombine4
It also fails on Mesa 10.2 branch.
I sent patch to mesa-dev which on my test did fix this issue: http://lists.freedesktop.org/archives/mesa-dev/2014-May/059194.html
(In reply to comment #2) > I sent patch to mesa-dev which on my test did fix this issue: > http://lists.freedesktop.org/archives/mesa-dev/2014-May/059194.html That's for the fs-code. This bisect was for vec4. Anyway, I've sent a revert for this patch.
Reverted.
Verified.Fixed.
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