Created attachment 97655 [details] output System Environment: -------------------------- Platform: Ivybridge Libdrm: (master)libdrm-2.4.53-6-gd4083dc762a2974c35ecd16be995272bbb6d57b4 Mesa: (master)ba6dcb3c2b8f516b120f591144bf6c3751f0e3f9 Xserver: (master)xorg-server-1.15.99.902-20-gc7011249d2abe6cc7af82ee4b79d8f6873444707 Xf86_video_intel:(master)2.99.911-89-g08e71e1820d6fcb6829b4ebd360beadc1f250295 Libva: (staging)5e10a246287fa2dd3fae2bf756a5b33087cc097c Libva_intel_driver:(staging)782b8afdda14f000874d8acf51c3e8c490d55773 Kernel: (drm-intel-nightly)1e771b84e47085ef9b6efea1321e7cb5a8b2c06 Bug detailed description: ----------------------------- It fails on Ivybridge and Haswell platforms with mesa master branch, and works well on 10.1 branch. Bisect shows:5ff1e446d44bb9d50f84883c7058635cb070e069 is the first bad commit commit 5ff1e446d44bb9d50f84883c7058635cb070e069 Author: Matt Turner <mattst88@gmail.com> AuthorDate: Wed Apr 9 14:31:10 2014 -0700 Commit: Matt Turner <mattst88@gmail.com> CommitDate: Fri Apr 18 09:16:19 2014 -0700 i965/fs: Simplify interference scan in register coalescing. We were starting at the beginning of the instruction list, rather than with the MOV instruction itself. This allows us to coalesce after control flow. Excluding the shaders from an unreleased title, the shader-db results: total instructions in shared programs: 1603791 -> 1594215 (-0.60%) instructions in affected programs: 678772 -> 669196 (-1.41%) GAINED: 5 LOST: 0 Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reproduce steps: ---------------------------- 1. xinit 2. ./GTF -width=64 -height=64 -run=GL3Tests/shadow/shadow_execution_frag.test
This is fixed (presumably papered-over, rather) by my load-payload series.
It also fails on Mesa 10.2 branch.
Reverted with a39428cf5c973513c5189dec4af34ce1e1582d51 on the master branch. Tagged to be picked to 10.2.
Verified.Fixed.
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