Bug 79498 - pipe!=0 msc resets when CRTC is off
Summary: pipe!=0 msc resets when CRTC is off
Status: CLOSED INVALID
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: XOrg git
Hardware: Other All
: medium normal
Assignee: Antti Koskipaa
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2014-06-01 07:28 UTC by Chris Wilson
Modified: 2017-07-24 22:54 UTC (History)
1 user (show)

See Also:
i915 platform:
i915 features:

Attachments

Description Chris Wilson 2014-06-01 07:28:34 UTC 
msc64: pipe=2 msc went backwards; was 257, now 0
msc64: pipe=1 msc went backwards; was 254, now 0

but it appears that pipe=0 worked.
Comment 1 Chris Wilson 2014-06-01 07:37:40 UTC 
Also: msc64: pipe=2 msc went backwards; was 4294967295, now 4294967294
i.e. -1 to -2
Comment 2 Chris Wilson 2014-06-02 07:42:25 UTC 
The warnings went away with a reboot. *shrug*

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