Created attachment 104270 [details]
dmesg from netconsole

==System Environment==
--------------------------
Regression: Yes.
Good commit: commit e1255d4cde1881345b2f68a39a96a995607b70e9
             Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
             Date:   Sat Jun 28 02:04:03 2014 +0300

             drm/i915: Clarify CHV swing margin/deemph bits
   

Non-working platforms: HSW

==kernel==
--------------------------
-nightly:  (test fails)
    commit c3b4c0436dffd0a2d25d9583bd6c3e64f5090603
    Author:     Daniel Vetter <daniel.vetter@ffwll.ch>
    AuthorDate: Thu Aug 7 16:50:48 2014 +0200
    Commit:     Daniel Vetter <daniel.vetter@ffwll.ch>
    CommitDate: Thu Aug 7 16:50:48 2014 +0200

    drm-intel-nightly: 2014y-08m-07d-16h-50m-27s integration manifest

-queued:  (test fails in the same way)
    commit 9de1683a0fa8ce9dc569bafd04f7487c8b9080ac
    Author:     Gajanan Bhat <gajanan.bhat@intel.com>
    AuthorDate: Thu Aug 7 17:03:30 2014 +0530
    Commit:     Daniel Vetter <daniel.vetter@ffwll.ch>
    CommitDate: Thu Aug 7 15:01:53 2014 +0200

    drm/i915: Add sprite watermark programming for VLV and CHV

-fixes:  (test fails in the same way)
    commit 7badbebb052ab30806289a4d4d35f35a7c4240d1
    Author:     Jiri Kosina <jkosina@suse.cz>
    AuthorDate: Thu Aug 7 16:29:53 2014 +0200
    Commit:     Daniel Vetter <daniel.vetter@ffwll.ch>
    CommitDate: Thu Aug 7 16:49:57 2014 +0200

    drm/i915: read HEAD register back in init_ring_common() to enforce ordering



==Bug detailed description==
-----------------------------
System fails to resume from S4. Dmesg from netconsole is attached.

But if rmmoded i915, S4 works well for at least 20 times


==Reproduce steps==
----------------------------
for ((i=0; i<20; i++))
do
  echo 0 > /sys/class/rtc/rtc0/wakealarm
  echo +15 > /sys/class/rtc/rtc0/wakealarm
  echo disk > /sys/power/state
done