Platform:IVB/HSW/BYT-M Libdrm:(master)libdrm-2.4.56-21-g8c2ae1695913990cbe6c6a8aa294f354eba33bd0 Mesa:(master)4ea1565bbc49df79d4c39ba5491b0a83c2679a05 Xserver:(master)xorg-server-1.16.0-152-g3a51418b2db353519a1779cf3cebbcc9afba2520 Xf86_video_intel:(master)2.99.916-2-ge0f7e9fc2f0b39b9e939ff48edea29950f125420 Cairo:(master)8e11a42e3e9b679dce97ac45cd8b47322536a253 Libva:(master)e0d25ece01e7aba819c910e98c4fb4706cdab055 Libva_intel_driver:(master)b18479e4fdd7af7cf2840542ef19dbe9114fdeaf Kernel:(drm-intel-nightly)4a3d32734bdcef6813b31f06a58430436e98711e Bug detailed description ------------------------------------------------ GPU Hang when running some cases on IVB/HSW/BYT-M,this issue doesn't exist on BDW. BTW,This issue fail rate is low on IVB/BYT-M. Detail info you can see hsw_dmesg.log and hsw_gpuhang_output.log and Xorg.0.log It's kernel(drm-intel-next-queued) regression,this issue also exist on drm-intel-nightly branch,bisected the result show first bad commit: commit 1ed26b0b84dab119de93723ad646229db748842d Author: Michel Thierry <michel.thierry@intel.com> AuthorDate: Fri Sep 5 14:13:16 2014 +0100 Commit: Daniel Vetter <daniel.vetter@ffwll.ch> CommitDate: Mon Sep 8 09:42:19 2014 +0200 drm/i915: Enable full PPGTT on gen7 Reproduced step: --------------------------------------------- 1. xinit& 2. vblank_mode=0 ./doom.x86 +exec doom3-pts.cfg +set sys_VideoRam 64 +set r_mode -1 +timedemoquit demo1 +set r_customWidth 1920 +set r_customHeight 1080 +set com_machineSpec 1
Created attachment 106026 [details] hsw_dmesg.log
To confirm the bisect, please try i915.enable_ppgtt=1
Created attachment 106027 [details] Xorg.0.log
(In reply to comment #2) > To confirm the bisect, please try i915.enable_ppgtt=1 I have tried this "i915.enable_ppgtt=1",it can works well.
Created attachment 106029 [details] hsw_gpuhang_output.log
*** Bug 83703 has been marked as a duplicate of this bug. ***
One Haswell specific bug so far: http://patchwork.freedesktop.org/patch/33319/
(In reply to comment #7) > One Haswell specific bug so far: > http://patchwork.freedesktop.org/patch/33319/ I have tried this patch: http://patchwork.freedesktop.org/patch/33319/ ,it can woks well on HSW,Please merge up the patch, thanks.
commit fbc69204b0d5911e623eb700f1b6fd637dcaa538 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed Sep 10 12:18:27 2014 +0100 drm/i915: HSW always use GGTT selector for secure batches gen6 and earlier conflate address space selection (ppgtt vs ggtt) with the security bit (i.e. only privileged batches were allowed to run from ggtt). From Haswell only, you are able to select the security bit separate from the address space - and we always requested to use ppgtt. This breaks the golden render state batch execution with full-ppgtt as that is only present in the global GTT and more generally any secure batch that is not colocated in the ppgtt and ggtt. So we need to disable the use of the ppgtt selector bit for secure batches, or else we hang immediately upon boot and thence after every GPU reset... v2: Only HSW differentiates between secure dispatch and ggtt, so simply ignore the differentiation and always use secure==ggtt. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> [danvet: Rectify commit message as noted by Chris.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Patch merged, please re-test on current nightly, and close the bug or adjust affected platforms as necessary. Thanks.
(In reply to comment #10) > Patch merged, please re-test on current nightly, and close the bug or adjust > affected platforms as necessary. Thanks. I have re-test drm-intel-nightly(git-72faa6a),not found this issue.
Verified it,verified commit is:git-449b37(drm-intel-next-queued).
Closing old verified.
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