Bug 87730 - [BDW/BSW/SKL]igt/gem_dummy_reloc_loop sporadically causes *ERROR* Hangcheck timer elapsed... blitter ring idle
Summary: [BDW/BSW/SKL]igt/gem_dummy_reloc_loop sporadically causes *ERROR* Hangcheck ...
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: unspecified
Hardware: All Linux (All)
: medium normal
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2014-12-26 03:39 UTC by lu hua
Modified: 2017-07-24 22:49 UTC (History)
2 users (show)

See Also:
i915 platform: BDW, BSW/CHT, SKL
i915 features: GEM/Other

Attachments
dmesg (124.87 KB, text/plain)
2014-12-26 03:39 UTC, lu hua 		no flags Details
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Description lu hua 2014-12-26 03:39:50 UTC 
Created attachment 111350 [details]
dmesg

==System Environment==
--------------------------
Regression: not sure

on-working platforms: BSW

==kernel==
--------------------------
drm-intel-next-queued/140fd38dc4962ae3694f81900b51c567df1b6d33

==Bug detailed description==
-----------------------------
It sporadically causes <3>[  119.754886] [drm:i915_hangcheck_elapsed [i915]] *ERROR* Hangcheck timer elapsed... blitter ring idle. Fail rate: 3/5.

output:
IGT-Version: 1.9-geb799b2 (x86_64) (Linux: 3.18.0-rc7_drm-intel-next-queued_140fd3_20141226+ x86_64)
running dummy loop on blt
dummy loop run on blt completed
Subtest blt: SUCCESS (50.930s)

==Reproduce steps==
---------------------------- 
1. ./gem_dummy_reloc_loop --run-subtest blt
Comment 1 lu hua 2015-03-17 06:38:52 UTC 
It also happens on SKL.
Comment 2 lu hua 2015-05-26 02:27:16 UTC 
It also happens on BDW.
Test sub cases mixed, mixed_multi_fd and render, they all have this issue.
Comment 3 Humberto Israel Perez Rodriguez 2015-09-23 16:53:01 UTC 
still happen on SKL-Y with the latest kernel :

Kernel commit log:
commit b4c4542ba1abfb0d3d6913504502573bf2c62b12
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Aug 28 15:51:30 2015 +0200
drm-intel-nightly: 2015y-08m-28d-13h-50m-34s UTC integration manifest
Comment 4 Chris Wilson 2016-01-28 10:26:25 UTC 
commit 7c17d377374ddbcfb7873366559fc4ed8b296e11
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Wed Jan 20 15:43:35 2016 +0200

    drm/i915: Use ordered seqno write interrupt generation on gen8+ execlists

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