Bug 88984 - [BSW/SKL]igt/gem_multi_bsd_sync_loop sporadically causes *ERROR* Hangcheck timer elapsed... render ring idle
Summary: [BSW/SKL]igt/gem_multi_bsd_sync_loop sporadically causes *ERROR* Hangcheck ti...
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: unspecified
Hardware: All Linux (All)
: medium normal
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2015-02-05 06:55 UTC by lu hua
Modified: 2017-07-24 22:48 UTC (History)
2 users (show)

See Also:
i915 platform: BSW/CHT, SKL
i915 features: GEM/Other


Attachments
dmesg (124.86 KB, text/plain)
2015-02-05 06:55 UTC, lu hua
no flags Details
dmesg(SKL) (119.45 KB, text/plain)
2015-03-17 07:00 UTC, lu hua
no flags Details

Description lu hua 2015-02-05 06:55:35 UTC
Created attachment 113174 [details]
dmesg

==System Environment==
--------------------------
Regression: not sure

no-working platforms: BSW

==kernel==
--------------------------
drm-intel-nightly/9583cb470cd82997b5f23d4acab852563f5c0047
commit 9583cb470cd82997b5f23d4acab852563f5c0047
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Feb 4 15:22:12 2015 +0100

    drm-intel-nightly: 2015y-02m-04d-14h-21m-52s UTC integration manifest

==Bug detailed description==
-----------------------------
It sporadically causes [drm:i915_hangcheck_elapsed [i915]] *ERROR* Hangcheck timer elapsed... render ring idle. fail rate:3/5

==Reproduce steps==
---------------------------- 
1. ./gem_multi_bsd_sync_loop
Comment 1 lu hua 2015-03-17 07:00:10 UTC
It also happens on SKL.
output:
IGT-Version: 1.10-g505645c (x86_64) (Linux: 4.0.0-rc4_drm-intel-nightly_4f7ab6_20150317+ x86_64)
SUCCESS (46.671s)
Comment 2 lu hua 2015-03-17 07:00:37 UTC
Created attachment 114373 [details]
dmesg(SKL)
Comment 3 Humberto Israel Perez Rodriguez 2015-09-23 17:24:30 UTC
still happen on SKL-Y with the latest kernel :

Kernel commit log:
commit b4c4542ba1abfb0d3d6913504502573bf2c62b12
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Aug 28 15:51:30 2015 +0200
drm-intel-nightly: 2015y-08m-28d-13h-50m-34s UTC integration manifest
Comment 4 Rami 2015-10-02 15:15:33 UTC
Not reproduced on BSW.

Hardware:
=========

Platform: Braswell M 
CPU : Intel(R) Celeron N3060 1.60GHz @ 1.6 GHz (family: 6, model: 76 stepping:
4)
SoC : BSW D0
QDF : K6XC
CRB : BRASWELL RVP Fab2
Mandatory Reworks : All 
Feature Reworks: F28, F32,F33 & F37
Optional reworks : O-01a


Software :
==========
Linux distribution: Ubuntu 14.04 LTS 64 bits 
BIOS : BRAS.X64.B084.R00.1508310642
TXE FW : 2.0.0.2073
Ksc : 1.08

kernel 4.3.0-rc2-drm-intel-nightly+
commit 794e1cdfb84be003dbd287c69501c98ec280a89b
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Mon Sep 28 17:28:29 2015 +0300

    drm-intel-nightly: 2015y-09m-28d-14h-28m-11s UTC integration manifest

cairo: (HEAD, tag: 1.14.2) 93422b3cb5e0ef8104b8194c8873124ce2f5ea2d from
git://git.freedesktop.org/git/cairo
drm: (HEAD, tag: libdrm-2.4.64, tag: 2.4.64)
ab2fadabde3829b1ec56bd4756165dd9bd281488 from
git://git.freedesktop.org/git/mesa/drm
intel-driver: (HEAD, origin/master, origin/HEAD, master)
2a72f99d24714f2a58f400ef63b913d4cf9080b3 from
git://git.freedesktop.org/git/vaapi/intel-driver
libva: (HEAD, tag: libva-1.6.1, origin/v1.6-branch)
613eb962b45fbbd1526d751e88e0d8897af6c0e0 from
git://git.freedesktop.org/git/vaapi/libva
mesa: (HEAD, tag: mesa-10.6.7) 32efdc87cbf89cfe08ad9571cd756e27c803caa8 from
git://git.freedesktop.org/git/mesa/mesa
xf86-video-intel: (HEAD, origin/master, origin/HEAD, master)
f0fd4d500de03c30c7ce19915f85acadd1ca4e5d from
git://git.freedesktop.org/git/xorg/driver/xf86-video-intel
xserver: (HEAD, tag: xorg-server-1.17.2)
2123f7682d522619f101b05fb75efa75dabbe371 from
git://git.freedesktop.org/git/xorg/xserver

intel-gpu-tools: (HEAD, tag: intel-gpu-tools-1.12)
1f9e0550455be4b219954a026407dd23ec21b299 from
git://git.freedesktop.org/git/xorg/app/intel-gpu-tools
Comment 5 Chris Wilson 2016-01-28 10:26:10 UTC
commit 7c17d377374ddbcfb7873366559fc4ed8b296e11
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Wed Jan 20 15:43:35 2016 +0200

    drm/i915: Use ordered seqno write interrupt generation on gen8+ execlists


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