Bug 89437 - [IVB] Piglit/glx_GLX_OML_sync_control_timing_-fullscreen_-divisor_2 fails
Summary: [IVB] Piglit/glx_GLX_OML_sync_control_timing_-fullscreen_-divisor_2 fails
Alias: None
Product: Mesa
Classification: Unclassified
Component: Drivers/DRI/i965 (show other bugs)
Version: unspecified
Hardware: All Linux (All)
: medium normal
Assignee: Intel 3D Bugs Mailing List
QA Contact: Intel 3D Bugs Mailing List
Depends on:
Reported: 2015-03-05 05:33 UTC by lu hua
Modified: 2019-09-25 18:53 UTC (History)
4 users (show)

See Also:
i915 platform:
i915 features:


Description lu hua 2015-03-05 05:33:31 UTC
System Environment:
Platform: IVB
Libdrm:         (master)libdrm-2.4.59-32-g080b4929b7452dc1fea32ac1d32e7e571e7fb38b
Mesa:           (master)b77576edc1a8010e5457f82b41c335ae27cb066b
Xserver:        (master)xorg-server-1.17.0-16-g3a06faf3fcdb7451125a46181f9152e8e59e9770
Xf86_video_intel:   (master)2.99.917-174-g3e390ec4110519746f2edbb3c38a40f0fc415430
Libva:          (master)f9741725839ea144e9a6a1827f74503ee39946c3
Kernel:   (drm-intel-nightly)a5217f77503a1089aeb8a9f4e3731e29c1ac2d41

Bug detailed description:
It sporadically fails on IVB with mesa master branch, fail rate:1/10

libGL: OpenDriver: trying /opt/X11R7/lib/dri/tls/i965_dri.so
libGL: OpenDriver: trying /opt/X11R7/lib/dri/i965_dri.so
Wallclock time between MSCs 16716.000000us does not match glXGetMscRateOML 16665.600000us
PIGLIT: {"result": "fail" }

==Reproduce steps==
1. xinit
2. ./bin/glx-oml-sync-control-timing -fullscreen -divisor 2 -auto
Comment 1 lu hua 2015-03-05 06:41:19 UTC
It also happens on 10.5 branch.
Comment 2 lu hua 2015-04-29 06:10:42 UTC
Test on the latest mesa master branch 10 cycles, it always fails.
libGL: OpenDriver: trying /opt/X11R7/lib/dri/tls/i965_dri.so
libGL: OpenDriver: trying /opt/X11R7/lib/dri/i965_dri.so
Wallclock time between MSCs 16766.666667us does not match glXGetMscRateOML 16699.159664us
PIGLIT: {"result": "fail" }
Comment 3 Juan A. Suarez 2016-11-03 16:14:21 UTC
This seems to has improved.

Using Mesa 13.1.0-devel (git-9f150ff) in IVB, almost all times the test pass without problems.

From time to time I get a warn instead, "iteration 0 woke up 2 MSCs later than expected"
Comment 4 Illia Iorin 2018-07-03 13:51:12 UTC
I made an investigation and came to the conclusion that the behavior of this test is based on such characteristics of the monitor as resolution and frequency, and on the window manager(different behavior on gnome and unity ).With resolution 1600x900 this test pass 88/100 times and with resolution 1920x1080 this test pass 11/100 times. Analyzing how the GLX_OML_sync_control  extension implements  in mesa, you can see that there are no calculation  based on the influencing characteristics. That means this is not a Mesa bug. This bug doesn't depend on gpu intel gpu architecture, because the test behavior the same on the KBL, IVB and HSW. You can have different behavior, if you change the characteristics of the display, or install another window manager. I think it's necessary to make at least one change in this test. I can’t quite understand where this constant(50) was taken. 

if (fabs (expected_msc_wallclock_duration - msc_wallclock_duration_stats.mean)> 50) 

I think we can increase it to 200, after that test will be working more stable.
Comment 5 GitLab Migration User 2019-09-25 18:53:31 UTC
-- GitLab Migration Automatic Message --

This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity.

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