Bug 89455 - [NVC0/Gallium] Unigine Heaven black and white boxes
Summary: [NVC0/Gallium] Unigine Heaven black and white boxes
Status: VERIFIED FIXED
Alias: None
Product: Mesa
Classification: Unclassified
Component: Drivers/DRI/nouveau (show other bugs)
Version: git
Hardware: Other All
: medium normal
Assignee: Nouveau Project
QA Contact: Nouveau Project
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2015-03-06 05:29 UTC by Luke
Modified: 2015-04-30 18:30 UTC (History)
0 users

See Also:
i915 platform:
i915 features:


Attachments
Example of the rendering issue (156.91 KB, image/jpeg)
2015-03-06 05:29 UTC, Luke
Details

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Description Luke 2015-03-06 05:29:54 UTC
Created attachment 114066 [details]
Example of the rendering issue

With a GeForce GTX 650 and Mesa 10.4, 10.5, and 10.6, Unigine Heaven 4 has black and white boxes that pop up randomly. 

https://unigine.com/products/heaven/download/
Comment 1 Ilia Mirkin 2015-03-06 05:32:51 UTC
Yeah... I thought it was my bad at one point, but I was able to repro the issue going back to mesa 9.1 or 9.0 iirc (which predates any of my changes). Note that this does not affect NV50, only NVC0.

The one issue on NVC0 that I'm aware of is _some_ sort of constbuf flushing problem... might be what's going on here.
Comment 2 Ilia Mirkin 2015-04-28 06:01:45 UTC
This patch seems to improve things for me (on a GF108). Pretty sure this is incomplete though.

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 248f98d..0420bf2 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -2433,6 +2433,8 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
          src1 = fetchSrc(1, c);
          geni = mkOp2(op, dstTy, dst0[c], src0, src1);
          geni->subOp = tgsi::opcodeToSubOp(tgsi.getOpcode());
+         if (dstTy == TYPE_F32)
+            geni->ftz = true;
       }
       break;
    case TGSI_OPCODE_MAD:
@@ -2442,7 +2444,9 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
          src0 = fetchSrc(0, c);
          src1 = fetchSrc(1, c);
          src2 = fetchSrc(2, c);
-         mkOp3(op, dstTy, dst0[c], src0, src1, src2);
+         geni = mkOp3(op, dstTy, dst0[c], src0, src1, src2);
+         if (dstTy == TYPE_F32)
+            geni->ftz = true;
       }
       break;
    case TGSI_OPCODE_MOV:
Comment 3 Ilia Mirkin 2015-04-28 07:37:18 UTC
I posted a more complete approach at http://patchwork.freedesktop.org/patch/48063/
Comment 4 Ilia Mirkin 2015-04-29 00:18:45 UTC
This should be fixed by:

commit 6fe0d4f0354418c6e68dd352996e9891ddd4dfd6
Author: Ilia Mirkin <imirkin@alum.mit.edu>
Date:   Tue Apr 28 03:30:08 2015 -0400

    nvc0/ir: flush denorms to zero in non-compute shaders
    
    This will set the FTZ flag (flush denorms to zero) on all opcodes that
    can take it.
    
    This resolves issues in Unigine Heaven 4.0 where there were solid-filled
    boxes popping up.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89455
    Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
    Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Comment 5 Luke 2015-04-30 18:30:18 UTC
Verified Fixed. Thanks for taking care of this Ilia!


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